D. Liang
According to our database1,
D. Liang
authored at least 2 papers
between 1998 and 2024.
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Bibliography
2024
A 32Gb/s 0.36pJ/bit 3nm Chiplet IO Using 2.5D CoWoS Package with Real-Time and Per-Lane CDR and Bathtub Monitoring.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
1998
Multi-strategy Local Search for SAT Problem.
Proceedings of the 13th European Conference on Artificial Intelligence, 1998