D. K. Mishra

According to our database, D. K. Mishra authored at least 6 papers between 2008 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2020

Precision measurement of ADC parameters with cumulative histogram technique using Gaussian noise.

Bhawana Garg, D. K. Mishra

Microelectron. J., 2020

A 32 nm Read Disturb-free 11T SRAM Cell with Improved Write Ability.

S. R. Mansore, R. S. Gamad, D. K. Mishra

J. Circuits Syst. Comput., 2020

2017

A Single-Ended Read Decoupled 9T SRAM Cell for Low Power Applications.

Shivram Mansore, Radheshyam Gamad, D. K. Mishra

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2017

2016

A 415 nW, 0.8 V, voltage reference circuit using MOSFETs in saturation and sub-threshold regions.

Dinesh Kushwaha, D. K. Mishra

Proceedings of the 11th International Conference on Industrial and Information Systems, 2016

2010

A two stage and three stage CMOS OPAMP with fast settling, high DC gain and low power designed in 180nm technology.

Anshu Gupta, D. K. Mishra, Rajesh Khatri, U. B. S. Chandrawat, Preet Jain

Proceedings of the 2010 International Conference on Computer Information Systems and Industrial Management Applications, 2010

2008

BIST Based Performance Evaluation of Field Programmable Analog Arrays.

Savita Charhate, D. K. Mishra

Proceedings of the First International Conference on Emerging Trends in Engineering and Technology, 2008