D. Dhanasekaran
Orcid: 0000-0002-7352-2542
According to our database1,
D. Dhanasekaran
authored at least 4 papers
between 2008 and 2024.
Collaborative distances:
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Bibliography
2024
Low power content addressable memory designing and implementation using voltage swing self adjustable match line technique.
Sustain. Comput. Informatics Syst., 2024
2021
A proficient remote information responsibility check protocol in multi-cloud environment.
Evol. Intell., 2021
2014
Computational analysis of amprenavir resistance triple mutant (V32I, I47V and V82I) in HIV-1 protease.
Netw. Model. Anal. Health Informatics Bioinform., 2014
2008
Fault Tolerant Dynamic Antenna Array in Smart Antenna System Using Evolved Virtual Reconfigurable Circuit.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008