Cuong Pham-Quoc

Orcid: 0000-0003-2917-1244

According to our database1, Cuong Pham-Quoc authored at least 45 papers between 2010 and 2024.

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Bibliography

2024
Compact and Low-Latency FPGA-Based Number Theoretic Transform Architecture for CRYSTALS Kyber Postquantum Cryptography Scheme.
Inf., July, 2024

A Resource-Efficient Multi-core Multi-thread RISC-V-based System-on-Chip.
Proceedings of the 21st International SoC Design Conference, 2024

A High-Throughput FPGA-Based Elliptic Curve Digital Signature Core for IoT Edge Platforms.
Proceedings of the Computational Science and Its Applications - ICCSA 2024 Workshops, 2024

2023
A flexible and efficient FPGA-based random forest architecture for IoT applications.
Internet Things, July, 2023

Contextual Perception in Internet of Mobile Things: A categorical structure.
Internet Things, July, 2023

An IoT System and MODIS Images Enable Smart Environmental Management for Mekong Delta.
Future Internet, July, 2023

Robust 3D Beamforming for Secure UAV Communications by DAE.
Mob. Networks Appl., June, 2023

HH-NIDS: Heterogeneous Hardware-Based Network Intrusion Detection Framework for IoT Security.
Future Internet, 2023

High-performance anomaly intrusion detection system with ensemble neural networks on reconfigurable hardware.
Concurr. Comput. Pract. Exp., 2023

Multi-Functional Resource-Constrained Elliptic Curve Cryptographic Processor.
IEEE Access, 2023

FPGA-Based Secured and Efficient Lightweight IoT Edge Devices with Customized RISC-V.
Proceedings of the International Conference on Computing and Communication Technologies, 2023

FPGA-Enabled Efficient Framework for High-Performance Intrusion Prevention Systems.
Proceedings of the Computational Science and Its Applications - ICCSA 2023 Workshops, 2023

FPGA-Based Hardware/Software Codesign for Video Encoder on IoT Edge Platforms.
Proceedings of the Computational Science and Its Applications - ICCSA 2023 Workshops, 2023

Scalable and Efficient Architecture for Random Forest on FPGA-Based Edge Computing.
Proceedings of the Euro-Par 2023: Parallel Processing Workshops - Euro-Par 2023 International Workshops, Limassol, Cyprus, August 28, 2023

2022
Towards An FPGA-targeted Hardware/Software Co-design Framework for CNN-based Edge Computing.
Mob. Networks Appl., 2022

Low-Cost Area-Efficient FPGA-Based Multi-Functional ECDSA/EdDSA.
Cryptogr., 2022

An FPGA-based Solution for Convolution Operation Acceleration.
CoRR, 2022

Building a smart traffic light system based on Internet of Things using -calculus.
Concurr. Comput. Pract. Exp., 2022

2021
A high-performance FPGA-based BWA-MEM DNA sequence alignment.
Concurr. Comput. Pract. Exp., 2021

Air Quality Monitoring Systems with Multiple Data Sources for Ho Chi Minh City.
EAI Endorsed Trans. Context aware Syst. Appl., 2021

Internet of Things Big Data Management and Analytic for Developing Smart City: A Survey and Future Studies.
Proceedings of the Context-Aware Systems and Applications, 2021

Hardware/Software Co-design for Convolutional Neural Networks Acceleration: A Survey and Open Issues.
Proceedings of the Context-Aware Systems and Applications, 2021

2020
Heterogeneous Hardware-based Network Intrusion Detection System with Multiple Approaches for SDN.
Mob. Networks Appl., 2020

Automatic FPGA-based Hardware Accelerator Design: A Case Study with Image Processing Applications.
EAI Endorsed Trans. Context aware Syst. Appl., 2020

Heterogeneous Hardware-assisted Parallel Processing for BWA-MEM DNA Alignment.
Proceedings of the 2020 RIVF International Conference on Computing and Communication Technologies, 2020

Hardware-assisted High-performance DNA Alignment System.
Proceedings of the ICIIT 2020: 5th International Conference on Intelligent Information Technology, 2020

Estimating Land Surface Temperature from Landsat-8 Images Based on a Cloud-Based Automated Processing Service.
Proceedings of the Context-Aware Systems and Applications, and Nature of Computation and Communication, 2020

2019
Context-Aware Mobility in Internet of Thing: A Survey.
EAI Endorsed Trans. Context aware Syst. Appl., 2019

IoT-Based Air-Pollution Hazard Maps Systems for Ho Chi Minh City.
Proceedings of the Context-Aware Systems and Applications, and Nature of Computation and Communication, 2019

High-Throughput Machine Learning Approaches for Network Attacks Detection on FPGA.
Proceedings of the Context-Aware Systems and Applications, and Nature of Computation and Communication, 2019

Context-Aware Mobility Based on \pi -Calculus in Internet of Thing: A Survey.
Proceedings of the Context-Aware Systems and Applications, and Nature of Computation and Communication, 2019

2018
An Efficient High-Throughput and Low-Latency SYN Flood Defender for High-Speed Networks.
Secur. Commun. Networks, 2018

An FPGA-Based Seed Extension IP Core for BWA-MEM DNA Alignment.
Proceedings of the 2018 International Conference on Advanced Computing and Applications, 2018

2017
A Scalable FPGA-based Floating-Point Gaussian Filtering Architecture.
Proceedings of the International Conference on Advanced Computing and Applications, 2017

BKVex: An Adaptable VLIW Processor and Design Framework for Reconfigurable Computing Platforms.
Proceedings of the International Conference on Advanced Computing and Applications, 2017

2016
FPGA-based Multicore Architecture for Integrating Multiple DDoS Defense Mechanisms.
SIGARCH Comput. Archit. News, 2016

A Secured OpenFlow-Based Switch Architecture.
Proceedings of the 2016 International Conference on Advanced Computing and Applications, 2016

2015
Heterogeneous Hardware Accelerators with Hybrid Interconnect: An Automated Design Approach.
Proceedings of the 2015 International Conference on Advanced Computing and Applications, 2015

2014
Automated Hybrid Interconnect Design for FPGA Accelerators Using Data Communication Profiling.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

High-Level Synthesis in the Delft Workbench Hardware/Software Co-design Tool-Chain.
Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, 2014

2013
Hybrid interconnect design for heterogeneous hardware accelerators.
Proceedings of the Design, Automation and Test in Europe, 2013

Heterogeneous hardware accelerators interconnect: An overview.
Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, 2013

2012
A heuristic-based communication-aware hardware optimization approach in heterogeneous multicore systems.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

Rule-based data communication optimization using quantitative communication profiling.
Proceedings of the 2012 International Conference on Field-Programmable Technology, 2012

2010
Hazard-free Muller Gates for Implementing Asynchronous Circuits on Xilinx FPGA.
Proceedings of the Fifth IEEE International Symposium on Electronic Design, 2010


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