Cristian Zambelli
Orcid: 0000-0001-8755-0504
According to our database1,
Cristian Zambelli
authored at least 42 papers
between 2011 and 2025.
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Bibliography
2025
Future Gener. Comput. Syst., 2025
2024
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2024
Proceedings of the 39th Conference on Design of Circuits and Integrated Systems, 2024
2023
Modeling 3D NAND Flash with Nonparametric Inference on Regression Coefficients for Reliable Solid-State Storage.
Future Internet, 2023
A Survey on Design Methodologies for Accelerating Deep Learning on Heterogeneous Architectures.
CoRR, 2023
CoRR, 2023
An HPC Pipeline for Calcium Quantification of Aortic Root From Contrast-Enhanced CCT Scans.
IEEE Access, 2023
Proceedings of the 31st IFIP/IEEE International Conference on Very Large Scale Integration, 2023
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
Insights into device and material origins and physical mechanisms behind cross temperature in 3D NAND.
Proceedings of the IEEE International Reliability Physics Symposium, 2023
2022
End-to-end modeling of variability-aware neural networks based on resistive-switching memory arrays.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022
Experimental verification and benchmark of in-memory principal component analysis by crosspoint arrays of resistive switching memory.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Statistical model of program/verify algorithms in resistive-switching memories for in-memory neural network accelerators.
Proceedings of the IEEE International Reliability Physics Symposium, 2022
2021
Proceedings of the IEEE International Reliability Physics Symposium, 2021
Comparative Analysis and Optimization of the SystemC-AMS Analog Simulation Efficiency of Resistive Crossbar Arrays.
Proceedings of the XXXVI Conference on Design of Circuits and Integrated Systems, 2021
2019
LDPC Soft Decoding with Improved Performance in 1X-2X MLC and TLC NAND Flash-Based Solid State Drives.
IEEE Trans. Emerg. Top. Comput., 2019
Enabling Computational Storage Through FPGA Neural Network Accelerator for Enterprise SSD.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
Reliability of CMOS Integrated Memristive HfO2 Arrays with Respect to Neuromorphic Computing.
Proceedings of the IEEE International Reliability Physics Symposium, 2019
Proceedings of the 49th European Solid-State Device Research Conference, 2019
2018
Experimental Investigation of 4-kb RRAM Arrays Programming Conditions Suitable for TCAM.
IEEE Trans. Very Large Scale Integr. Syst., 2018
IEEE Trans. Emerg. Top. Comput., 2018
Is Consumer Electronics Redesigning Our Cars?: Challenges of Integrated Technologies for Sensing, Computing, and Storage.
IEEE Consumer Electron. Mag., 2018
Correlating Power Efficiency and Lifetime to Programming Strategies in RRAM-Based FPGAs.
Proceedings of the 2018 New Generation of CAS, 2018
2017
Proc. IEEE, 2017
Proc. IEEE, 2017
2016
ATHENIS_3D: Automotive tested high-voltage and embedded non-volatile integrated SoC platform with 3D technology.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
Performance and Reliability Analysis of Cross-Layer Optimizations of NAND Flash Controllers.
ACM Trans. Embed. Comput. Syst., 2015
SSDExplorer: A Virtual Platform for Performance/Reliability-Oriented Fine-Grained Design Space Exploration of Solid State Drives.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
Proceedings of the 15th Non-Volatile Memory Technology Symposium, 2015
Reliability and cell-to-cell variability of TAS-MRAM arrays under cycling conditions.
Proceedings of the 15th Non-Volatile Memory Technology Symposium, 2015
RRAM Reliability/Performance Characterization through Array Architectures Investigations.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Proceedings of the 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2015
2014
FLARES: An Aging Aware Algorithm to Autonomously Adapt the Error Correction Capability in NAND Flash Memories.
ACM Trans. Archit. Code Optim., 2014
Proceedings of the 9th International Design and Test Symposium, 2014
SSDExplorer: A virtual platform for fine-grained design space exploration of Solid State Drives.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
2013
System interconnect extensions for fully transparent demand paging in low-cost MMU-less embedded systems.
Proceedings of the 2013 International Symposium on System on Chip, 2013
2012
Electrical characterization, physics, modeling and reliability of innovative non-volatile memories.
PhD thesis, 2012
Microelectron. Reliab., 2012
A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
2011
Nonvolatile Memory Partitioning Scheme for Technology-Based Performance-Reliability Tradeoff.
IEEE Embed. Syst. Lett., 2011