Cristian Grecu
According to our database1,
Cristian Grecu
authored at least 31 papers
between 2003 and 2014.
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
2014
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014
2011
Proceedings of the NOCS 2011, 2011
2009
IET Comput. Digit. Tech., 2009
2008
IEEE Trans. Educ., 2008
J. Syst. Archit., 2008
Design of Low Power & Reliable Networks on Chip Through Joint Crosstalk Avoidance and Multiple Error Correction Coding.
J. Electron. Test., 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008
Coordinated versus Uncoordinated Checkpoint Recovery for Network-on-Chip Based Systems.
Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008
2007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
Proceedings of the First International Symposium on Networks-on-Chips, 2007
Addressing Signal Integrity in Networks on Chip Interconnects through Crosstalk-Aware Double Error Correction Coding.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
Applicability of Energy Efficient Coding Methodology to Address Signal Integrity in 3D NoC Fabrics.
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007
Performance Evaluation of Adaptive Routing Algorithms for achieving Fault Tolerance in NoC Fabrics.
Proceedings of the IEEE International Conference on Application-Specific Systems, 2007
2006
Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006
Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006
Design of Low power & Reliable Networks on Chip through joint crosstalk avoidance and forward error correction coding.
Proceedings of the 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 2006
Proceedings of the 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 2006
2005
Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures.
IEEE Trans. Computers, 2005
Microelectron. J., 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005
2004
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004
Structured interconnect architecture: a solution for the non-scalability of bus-based SoCs.
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004
2003
Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003