Congming Gao
Orcid: 0000-0003-2611-2652
According to our database1,
Congming Gao
authored at least 44 papers
between 2014 and 2024.
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Bibliography
2024
Optimizing Garbage Collection for ZNS SSDs via In-storage Data Migration and Address Remapping.
ACM Trans. Archit. Code Optim., December, 2024
ACM Trans. Storage, November, 2024
ACM Trans. Storage, November, 2024
ACM Trans. Archit. Code Optim., March, 2024
Space-efficient and high-performance inline deduplication for emerging hybrid storage system with Libra+.
J. Syst. Archit., 2024
Hook: A Pattern Locality Guided Prefetch with Enhanced Read Performance for Hybrid SSDs.
Proceedings of the 13th Non-Volatile Memory Systems and Applications Symposium, 2024
Proceedings of the International Conference on Networking, Architecture and Storage, 2024
Ares-Flash: Efficient Parallel Integer Arithmetic Operations Using NAND Flash Memory.
Proceedings of the 57th IEEE/ACM International Symposium on Microarchitecture, 2024
Midas Touch: Invalid-Data Assisted Reliability and Performance Boost for 3d High-Density Flash.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
2023
ADAR: Application-Specific Data Allocation and Reprogramming Optimization for 3-D TLC Flash Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2023
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
RLAlloc: A Deep Reinforcement Learning-Assisted Resource Allocation Framework for Enhanced Both I/O Throughput and QoS Performance of Multi-Streamed SSDs.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Libra: A Space-Efficient, High-Performance Inline Deduplication for Emerging Hybrid Storage System.
Proceedings of the IEEE Intl Conf on Parallel & Distributed Processing with Applications, 2023
2022
CCF Trans. High Perform. Comput., 2022
2021
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021
Pattern-Guided File Compression with User-Experience Enhancement for Log-Structured File System on Mobile Devices.
Proceedings of the 19th USENIX Conference on File and Storage Technologies, 2021
2020
Process Variation Aware Read Performance Improvement for LDPC-Based nand Flash Memory.
IEEE Trans. Reliab., 2020
IEEE Trans. Parallel Distributed Syst., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Maximizing I/O Throughput and Minimizing Performance Variation via Reinforcement Learning Based I/O Merging for SSDs.
IEEE Trans. Computers, 2020
2019
Minimizing Retention Induced Refresh Through Exploiting Process Variation of Flash Memory.
IEEE Trans. Computers, 2019
Proceedings of the 34th ACM/SIGAPP Symposium on Applied Computing, 2019
Proceedings of the 2019 IEEE Non-Volatile Memory Systems and Applications Symposium, 2019
Optimizing Tail Latency of LDPC based Flash Memory Storage Systems Via Smart Refresh.
Proceedings of the 2019 IEEE International Conference on Networking, 2019
Parallel all the time: Plane Level Parallelism Exploration for High Performance SSDs.
Proceedings of the 35th Symposium on Mass Storage Systems and Technologies, 2019
Constructing Large, Durable and Fast SSD System via Reprogramming 3D TLC Flash Memory.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019
2018
Exploiting Chip Idleness for Minimizing Garbage Collection - Induced Chip Access Conflict on SSDs.
ACM Trans. Design Autom. Electr. Syst., 2018
Exploiting Parallelism for Access Conflict Minimization in Flash-Based Solid State Drives.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Access Characteristic Guided Read and Write Regulation on Flash Based Storage Systems.
IEEE Trans. Computers, 2018
Proceedings of the IEEE 7th Non-Volatile Memory Systems and Applications Symposium, 2018
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018
Loss is Gain: Shortening Data for Lifetime Improvement on Low-Cost ECC Enabled Consumer-Level Flash Memory.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018
Revisiting wear leveling design on compression applied 3D NAND flash memory: work-in-progress.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2018
2017
ACM Trans. Embed. Comput. Syst., 2017
Asymmetric Error Rates of Cell States Exploration for Performance Improvement on Flash Memory Based Storage Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
2016
Minimizing cell-to-cell interference by exploiting differential bit impact characteristics of scaled MLC NAND flash memories.
Proceedings of the 5th Non-Volatile Memory Systems and Applications Symposium, 2016
2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
2014
Exploiting parallelism in I/O scheduling for access conflict minimization in flash-based solid state drives.
Proceedings of the IEEE 30th Symposium on Mass Storage Systems and Technologies, 2014
Exploit asymmetric error rates of cell states to improve the performance of flash memory storage systems.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014