Clay Hughes

According to our database, Clay Hughes authored at least 23 papers between 2008 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

SEFsim: A Statistically-Guided Fast DRAM Simulator.

Debpratim Adak, Hyokeun Lee, Ben Feinberg, Gwendolyn Voskuilen, Clayton Hughes, Huiyang Zhou, Amro Awad

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2024

2023

Evaluation of HPC Workloads Running on Open-Source RISC-V Hardware.

Luc Berger-Vergiat, Suma George Cardwell, Ben Feinberg, Simon D. Hammond, Clayton Hughes, Michael J. Levenhagen, Kevin T. Pedretti

Proceedings of the High Performance Computing, 2023

ERAS: A Flexible and Scalable Framework for Seamless Integration of RTL Models with Structural Simulation Toolkit.

Shubham Nema, Shiva Kaushik Chunduru, Charan Kodigal, Gwendolyn Voskuilen, Arun F. Rodrigues, K. Scott Hemmert, Ben Feinberg, Hyokeun Lee, Amro Awad, Clayton Hughes

Proceedings of the IEEE International Symposium on Workload Characterization, 2023

2022

FAT-PIM: Low-Cost Error Detection for Processing-In-Memory.

Kazi Abu Zubair, Sumit Kumar Jha, David Mohaisen, Clayton Hughes, Amro Awad

CoRR, 2022

"Smarter" NICs for faster molecular dynamics: a case study.

Sara Karamati, Clayton Hughes, K. Scott Hemmert, Ryan E. Grant, Whit Schonbein, Scott Levy, Thomas M. Conte, Jeffrey Young, Richard W. Vuduc

Proceedings of the 2022 IEEE International Parallel and Distributed Processing Symposium, 2022

Minerva: Rethinking Secure Architectures for the Era of Fabric-Attached Memory Architectures.

Mazen Al-Wadi, Rujia Wang, David Mohaisen, Clayton Hughes, Simon David Hammond, Amro Awad

Proceedings of the 2022 IEEE International Parallel and Distributed Processing Symposium, 2022

ATHENA: Enabling Codesign for Next-Generation AI/ML Architectures.

Mark Plagge, Ben Feinberg, John McFarland, Fred Rothganger, Sapan Agarwal, Amro Awad, Clayton Hughes, Suma George Cardwell

Proceedings of the IEEE International Conference on Rebooting Computing, 2022

2021

DeACT: Architecture-Aware Virtual Memory Support for Fabric Attached Memory Systems.

Vamsee Reddy Kommareddy, Clayton Hughes, Simon David Hammond, Amro Awad

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

Stealth-Persist: Architectural Support for Persistent Applications in Hybrid Memory Systems.

Mazen Al-Wadi, Vamsee Reddy Kommareddy, Clayton Hughes, Simon David Hammond, Amro Awad

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2020

PreFAM: Understanding the Impact of Prefetching in Fabric-Attached Memory Architectures.

Vamsee Reddy Kommareddy, Jagadish Kotra, Clayton Hughes, Simon David Hammond, Amro Awad

Proceedings of the MEMSYS 2020: The International Symposium on Memory Systems, 2020

2019

Page migration support for disaggregated non-volatile memories.

Vamsee Reddy Kommareddy, Simon David Hammond, Clayton Hughes, Ahmad Samih, Amro Awad

Proceedings of the International Symposium on Memory Systems, 2019

Investigating Fairness in Disaggregated Non-Volatile Memories.

Vamsee Reddy Kommareddy, Clayton Hughes, Simon D. Hammond, Amro Awad

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Evaluating the Marvell ThunderX2 Server Processor for HPC Workloads.

Simon D. Hammond, Clay Hughes, Michael J. Levenhagen, Courtenay T. Vaughan, Andrew J. Younge, Benjamin Schwaller, Michael J. Aguilar, Kevin T. Pedretti, James H. Laros III

Proceedings of the 17th International Conference on High Performance Computing & Simulation, 2019

2018

Exploring Allocation Policies in Disaggregated Non-Volatile Memories.

Vamsee Reddy Kommareddy, Amro Awad, Clayton Hughes, Simon David Hammond

Proceedings of the Workshop on Memory Centric High Performance Computing, 2018

Osiris: A Low-Cost Mechanism to Enable Restoration of Secure Non-Volatile Memories.

Mao Ye, Clayton Hughes, Amro Awad

Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

Evaluating the Intel Skylake Xeon Processor for HPC Workloads.

Simon D. Hammond, Courtenay T. Vaughan, Clay Hughes

Proceedings of the 2018 International Conference on High Performance Computing & Simulation, 2018

2017

Performance analysis for using non-volatile memory DIMMs: opportunities and challenges.

Amro Awad, Simon D. Hammond, Clay Hughes, Arun Rodrigues, K. Scott Hemmert, Robert J. Hoekstra

Proceedings of the International Symposium on Memory Systems, 2017

2012

Real-time hardware design for improving laser detection and ranging accuracy.

Jarrod Brown, Clay Hughes, Linda DeBrunner

Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012

2011

Optimizing throughput/power trade-offs in hardware transactional memory using DVFS and intelligent scheduling.

Clay Hughes, Tao Li

Proceedings of the 25th International Conference on Supercomputing, 2011, Tucson, AZ, USA, May 31, 2011

2009

TransPlant: A parameterized methodology for generating transactional memory workloads.

James Poe, Clay Hughes, Tao Li

Proceedings of the 17th Annual Meeting of the IEEE/ACM International Symposium on Modelling, 2009

On the (dis)similarity of transactional memory workloads.

Clay Hughes, James Poe, Amer Qouneh, Tao Li

Proceedings of the 2009 IEEE International Symposium on Workload Characterization, 2009

TransMetric: architecture independent workload characterization for transactional memory benchmarks.

James Poe, Clay Hughes, Tao Li

Proceedings of the 23rd international conference on Supercomputing, 2009

2008

Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesis.

Clay Hughes, Tao Li

Proceedings of the 4th International Symposium on Workload Characterization (IISWC 2008), 2008