Claudio Mucci

Orcid: 0000-0002-4660-207X

According to our database1, Claudio Mucci authored at least 28 papers between 2003 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2020
A Fully Programmable eFPGA-Augmented SoC for Smart Power Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

2015
Soft-Core Embedded-FPGA Based on Multistage Switching Networks: A Quantitative Analysis.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Power-Aware Job Scheduling on Heterogeneous Multicore Architectures.
IEEE Trans. Parallel Distributed Syst., 2015

2014
Multicore Signal Processing Platform With Heterogeneous Configurable Hardware Accelerators.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Soft-core eFPGA for Smart Power applications.
Proceedings of the 2014 International Symposium on System-on-Chip, 2014

2013
Application Space Exploration of a Heterogeneous Run-Time Configurable Digital Signal Processor.
IEEE Trans. Very Large Scale Integr. Syst., 2013

2009
A multi-core signal processor for heterogeneous reconfigurable computing.
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

2008
Design space exploration of an open-source, IP-reusable, scalable floating-point engine for embedded applications.
J. Syst. Archit., 2008

An Interconnect Strategy for a Heterogeneous, Reconfigurable SoC.
IEEE Des. Test Comput., 2008

Sustainable (re-) configurable solutions for the high volume SoC market.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

Implementation of Parallel LFSR-based Applications on an Adaptive DSP featuring a Pipelined Configurable Gate Array.
Proceedings of the Design, Automation and Test in Europe, 2008

Design of a HW/SW Communication Infrastructure for a Heterogeneous Reconfigurable Processor.
Proceedings of the Design, Automation and Test in Europe, 2008

2007
Intelligent cameras and embedded reconfigurable computing: a case-study on motion detection.
Proceedings of the International Symposium on System-on-Chip, 2007

Interactive presentation: Implementation of AES/Rijndael on a dynamically reconfigurable architecture.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

A dynamically adaptive DSP for heterogeneous reconfigurable platforms.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
XiSystem: a XiRisc-based SoC with reconfigurable IO module.
IEEE J. Solid State Circuits, 2006

A case-study on multimedia applications for the XiRisc reconfigurable processor.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A stream register file unit for reconfigurable processors.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A Multi-Context Pipelined Array for Embedded Systems.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

A Low-Power Routing Architecture Optimized for Deep Sub-Micron FPGAs.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

Design and implementation of a reconfigurable heterogeneous multiprocessor SoC.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005
A FPGA Implementation of An Open-Source Floating-Point Computation System.
Proceedings of the 2005 International Symposium on System-on-Chip, 2005

A Cycle-Accurate ISS for a Dynamically Reconfigurable Processor Architecture.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

An Embedded Reconfigurable Datapath for SoC.
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

2004
An in-circuit debug environment for multiprocessor SOCs based on a HDL RISC soft-core.
Proceedings of the 2004 International Symposium on System-on-Chip, 2004

A Dataflow Control Unit for C-to-Configurable Pipelines Compilation Flow.
Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004

A XiRisc-based SoC for embedded DSP applications.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003
A C-based algorithm development flow for a reconfigurable processor architecture.
Proceedings of the 2003 International Symposium on System-on-Chip, 2003


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