Claire Maïza
Orcid: 0000-0002-5977-6685Affiliations:
- VERIMAG, Grenoble, France
- Grenoble INP, France
- Grenoble Alpes University, France
- Saarland University, Saarbrücken, Germany
According to our database1,
Claire Maïza
authored at least 38 papers
between 2005 and 2020.
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Bibliography
2020
A study of predictable execution models implementation for industrial data-flow applications on a multi-core platform with shared banked memory.
Proceedings of the 41st IEEE Real-Time Systems Symposium, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
Leibniz Trans. Embed. Syst., 2019
ACM Comput. Surv., 2019
Response time analysis of dataflow applications on a many-core processor with shared-memory and network-on-chip.
Proceedings of the 27th International Conference on Real-Time Networks and Systems, 2019
2018
Real Time Syst., 2018
2017
Proceedings of the 17th International Workshop on Worst-Case Execution Time Analysis, 2017
Proceedings of the Computer Aided Verification - 29th International Conference, 2017
2016
Proceedings of the 24th International Conference on Real-Time Networks and Systems, 2016
2015
Dagstuhl Reports, 2015
Proceedings of the 15th International Workshop on Worst-Case Execution Time Analysis, 2015
Proceedings of the 23rd International Conference on Real Time Networks and Systems, 2015
Proceedings of the 23rd International Conference on Real Time Networks and Systems, 2015
Proceedings of the 23rd International Conference on Real Time Networks and Systems, 2015
Complexity of scheduling real-time tasks subjected to cache-related preemption delays.
Proceedings of the 20th IEEE Conference on Emerging Technologies & Factory Automation, 2015
2014
Proceedings of the 20th IEEE Real-Time and Embedded Technology and Applications Symposium, 2014
How to compute worst-case execution time by optimization modulo theory and a clever encoding of program semantics.
Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2014
2013
Proceedings of the 13th International Workshop on Worst-Case Execution Time Analysis, 2013
Proceedings of the 21st International Conference on Real-Time Networks and Systems, 2013
Proceedings of the 19th IEEE Real-Time and Embedded Technology and Applications Symposium, 2013
Proceedings of the 25th Euromicro Conference on Real-Time Systems, 2013
2012
Improved cache related pre-emption delay aware response time analysis for fixed priority pre-emptive systems.
Real Time Syst., 2012
Proceedings of the 33rd IEEE Real-Time Systems Symposium, 2012
2011
J. Syst. Archit., 2011
Cache Related Pre-emption Delay Aware Response Time Analysis for Fixed Priority Pre-emptive Systems.
Proceedings of the 32nd IEEE Real-Time Systems Symposium, 2011
Proceedings of the 19th International Conference on Real-Time and Network Systems, 2011
2010
Proceedings of the Verification, 2010
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, 2010
2009
Cache-Related Preemption Delay Computation for Set-Associative Caches - Pitfalls and Solutions.
Proceedings of the 9th Intl. Workshop on Worst-Case Execution Time Analysis, 2009
A New Notion of Useful Cache Block to Improve the Bounds of Cache-Related Preemption Delay.
Proceedings of the 21st Euromicro Conference on Real-Time Systems, 2009
2006
Proceedings of the 6th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis, 2006
2005
Proceedings of the 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2005), 2005
Proceedings of the 2005 Design, 2005