Ckristian Duran

Orcid: 0000-0003-3746-8320

According to our database¹, Ckristian Duran authored at least 27 papers between 2016 and 2024.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

Timeline

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Bibliography

2024

Hardware-Friendly Implementation of Physical Reservoir Computing with CMOS-based Time-domain Analog Spiking Neurons.

[BibT_eX]

[DOI]

CoRR, 2024

A Unified OTP and PUF Exploiting Post-Program Current on Standard CMOS Technology.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023

In-NVRAM Unified PUF and TRNG Based on Standard CMOS Technology.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

Systems on a Chip With 8 and 32 Bits Processors in 0.18-μm Technology for IoT Applications.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2022

A 10pJ/bit 256b AES-SoC Exploiting Memory Access Acceleration.

[BibT_eX]

[DOI]

Ckristian Duran

Elkim Roa

IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Unified PUF and Crypto Core Exploiting the Metastability in Latches.

[BibT_eX]

[DOI]

Future Internet, 2022

ChaCha20-Poly1305 Authenticated Encryption with Additional Data for Transport Layer Security 1.3.

[BibT_eX]

[DOI]

Cryptogr., 2022

A Unified NVRAM and TRNG in Standard CMOS Technology.

[BibT_eX]

[DOI]

IEEE Access, 2022

A Robust and Healthy Against PVT Variations TRNG Based on Frequency Collapse.

[BibT_eX]

[DOI]

IEEE Access, 2022

Trusted Execution Environment Hardware by Isolated Heterogeneous Architecture for Key Scheduling.

[BibT_eX]

[DOI]

IEEE Access, 2022

A 3.65 Gb/s Area-Efficiency ChaCha20 Cryptocore.

[BibT_eX]

[DOI]

Proceedings of the 19th International SoC Design Conference, 2022

2021

A Sub-μ W Reversed-Body-Bias 8-bit Processor on 65-nm Silicon-on-Thin-Box (SOTB) for IoT Applications.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2021

A Fully Digital True Random Number Generator With Entropy Source Based in Frequency Collapse.

[BibT_eX]

[DOI]

IEEE Access, 2021

A Low-Power Low-Area SoC based in RISC-V Processor for IoT Applications.

[BibT_eX]

[DOI]

Proceedings of the 18th International SoC Design Conference, 2021

ChaCha20-Poly1305 Crypto Core Compatible with Transport Layer Security 1.3.

[BibT_eX]

[DOI]

Proceedings of the 18th International SoC Design Conference, 2021

Routing-Aware Standard Cell Placement Algorithm Applying Boolean Satisfiability.

[BibT_eX]

[DOI]

Ckristian Duran

Elkim Roa

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

AES Sbox Acceleration Schemes for Low-Cost SoCs.

[BibT_eX]

[DOI]

Ckristian Duran

Héctor Gómez

Elkim Roa

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

System-on-Chip Implementation of Trusted Execution Environment with Heterogeneous Architecture.

[BibT_eX]

[DOI]

Proceedings of the IEEE Hot Chips 33 Symposium, 2021

2020

Low-power high-performance 32-bit RISC-V microcontroller on 65-nm silicon-on-thin-BOX (SOTB).

[BibT_eX]

[DOI]

Quynh Nguyen Quang Nhu

IEICE Electron. Express, 2020

Quick Boot of Trusted Execution Environment With Hardware Accelerators.

[BibT_eX]

[DOI]

Trong-Thuc Hoang

Ckristian Duran

Duc-Thinh Nguyen-Hoang

IEEE Access, 2020

Cryptographic Accelerators for Trusted Execution Environment in RISC-V Processors.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Simulation and Formal: The Best of Both Domains for Instruction Set Verification of RISC-V Based Processors.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

An Energy-Efficient RISC-V RV32IMAC Microcontroller for Periodical-Driven Sensing Applications.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019

Defeating Silicon Reverse Engineering Using a Layout-Level Standard Cell Camouflage.

[BibT_eX]

[DOI]

Héctor Gómez

Ckristian Duran

Elkim Roa

IEEE Trans. Consumer Electron., 2019

A Low-Area Direct Memory Access Controller Architecture for a RISC-V Based Low-Power Microcontroller.

[BibT_eX]

[DOI]

Hanssel Morales

Ckristian Duran

Elkim Roa

Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

2018

Standard cell camouflage method to counter silicon reverse engineering.

[BibT_eX]

[DOI]

Héctor Gómez

Ckristian Duran

Elkim Roa

Proceedings of the IEEE International Conference on Consumer Electronics, 2018

2016

A 32-bit RISC-V AXI4-lite bus-based microcontroller with 10-bit SAR ADC.

[BibT_eX]

[DOI]

Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

Ckristian Duran

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