Ciaran McIvor

According to our database, Ciaran McIvor authored at least 8 papers between 2003 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2007

High-speed & Low Area Hardware Architectures of the Whirlpool Hash Function.

Máire McLoone, Ciaran McIvor

J. VLSI Signal Process., 2007

2006

Hardware Elliptic Curve Cryptographic Processor Over $\rm GF(p)$.

Ciaran McIvor, Máire McLoone, John V. McCanny

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

2005

High-Speed Hardware Architectures of the Whirlpool Hash Function.

Máire McLoone, Ciaran McIvor, Aidan Savage

Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005

High-Radix Systolic Modular Multiplication on Reconfigurable Hardware.

Ciaran McIvor, Máire McLoone, John V. McCanny

Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005

2004

FPGA Montgomery modular multiplication architectures suitable for ECCs over GF(p).

Ciaran McIvor, Máire McLoone, John V. McCanny

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Coarsely integrated operand scanning (CIOS) architecture for high-speed Montgomery modular multiplication.

Máire McLoone, Ciaran McIvor, John V. McCanny

Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

FPGA Montgomery Multiplier Architectures - A Comparison.

Ciaran McIvor, Máire McLoone, John V. McCanny

Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004

2003

A high-speed, low latency RSA decryption silicon core.

Ciaran McIvor, Máire McLoone, John V. McCanny

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003