Chuxiong Lin
Orcid: 0000-0001-9954-9025
According to our database1,
Chuxiong Lin
authored at least 8 papers
between 2020 and 2024.
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Bibliography
2024
A Metastability Risk Prediction and Mitigation Technique for Clock-Domain Crossing With Single-Stage Synchronizer in Near-Threshold-Voltage Multivoltage/ Frequency-Domain Network-on-Chip.
IEEE J. Solid State Circuits, February, 2024
Reducing DRAM Latency via In-situ Temperature- and Process-Variation-Aware Timing Detection and Adaption.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
2023
CDAR-DRAM: Enabling Runtime DRAM Performance and Energy Optimization via In-Situ Charge Detection and Adaptive Data Restoration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2023
A Metastability Inference and Avoidance Technique for Near-Threshold-Voltage Network-on-Chip.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
2022
MPAM: Reliable, Low-Latency, Near-Threshold-Voltage Multi-Voltage/Frequency-Domain Network-on-Chip with Metastability Risk Prediction and Mitigation.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
2021
MEDAC: A Metastability Condition Detection and Correction Technique for a Near-Threshold-Voltage Multi-Voltage-/Frequency-Domain Network-on-Chip.
IEEE J. Solid State Circuits, 2021
CDAR-DRAM: An In-situ Charge Detection and Adaptive Data Restoration DRAM Architecture for Performance and Energy Efficiency Improvement.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
2020
25.8 A Near- Threshold-Voltage Network-on-Chip with a Metastability Error Detection and Correction Technique for Supporting a Quad-Voltage/Frequency-Domain Ultra-Low-Power System-on-a-Chip.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020