Chutham Sawigun

According to our database, Chutham Sawigun authored at least 36 papers between 2006 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

A Highly-Integrated 1536-Channel Quad-Shank Monolithic Neural Probe in 55nm CMOS for Full-Band Raw-Signal Recording.

Xiaolin Yang, Joan Aymerich, Philippe Coppejans, Wen-Yang Hsu, Chutham Sawigun, Jose Cisneros-Fernández, Andrea Lodi, Maribel Caceres Rivera, Bernardo Tacca, Matt McDonald, Hasan Mahmud-UI, Barundeb Dutta, Jan Putzeys, Carolina Mora Lopez

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

A 16-Ch CMI-Tolerant Neural AFE with Inherent CM Detection and Shared CM Suppression Achieving 0.006mm2/Ch and 3.1μW/Ch.

Joan Aymerich, Chutham Sawigun, Jose Cisneros-Fernández, Xiaolin Yang, Carolina Mora Lopez

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2023

A Micropower Chopper CBIA Using DSL-Embedded Input Stage With 0.4 V EO Tolerance for Dry-Electrode Biopotential Recording.

Surachoke Thanapitak, Wanlop Surakampontorn, Chutham Sawigun

IEEE Trans. Biomed. Circuits Syst., June, 2023

An AC-Coupled 1st-Order Δ-ΔΣ Readout IC for Area-Efficient Neural Signal Acquisition.

Xiaolin Yang, Marco Ballini, Chutham Sawigun, Wen-Yang Hsu, Jan-Willem Weijers, Jan Putzeys, Carolina Mora Lopez

IEEE J. Solid State Circuits, 2023

A 0-to-35mA NMOS Capacitor-Less LDO with Dual-Loop Regulation Achieving 3ns Response Time and 1pF-to-10nF Loading Range.

Wen-Yang Hsu, Joan Aymerich, Xiaolin Yang, Chutham Sawigun, Philippe Coppejans, Carolina Mora Lopez

Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

2022

A 128-Channel AC-Coupled 1^st-order Δ-Δ∑ IC for Neural Signal Acquisition.

Xiaolin Yang, Marco Ballini, Chutham Sawigun, Wen-Yang Hsu, Jan-Willem Weijers, Jan Putzeys, Carolina Mora Lopez

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

A Chopper Biopotential Instrumentation Amplifier With DSL-Embedded Input Stage Achieving 109 dB CMRR and 400 mV DC Offset Tolerance.

Surachoke Thanapitak, Chutham Sawigun

Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

2021

A Compact Sub-μW CMOS ECG Amplifier With 57.5-MΩ Z_in, 2.02 NEF, 8.16 PEF and 83.24-dB CMRR.

Chutham Sawigun, Surachoke Thanapitak

IEEE Trans. Biomed. Circuits Syst., 2021

A 77-dB DR 16-Ch 2^nd-order Δ-ΔΣ Neural Recording Chip with 0.0077mm²/Ch.

Shiwei Wang, Marco Ballini, Xiaolin Yang, Chutham Sawigun, Jan-Willem Weijers, Dwaipayan Biswas, Carolina Mora Lopez

Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

2019

A Nanopower Biopotential Lowpass Filter Using Subthreshold Current-Reuse Biquads With Bulk Effect Self-Neutralization.

Chutham Sawigun, Surachoke Thanapitak

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A 63 nW, 250 Hz, 70 dB-DR, Subthreshold CMOS Follower-Based LPF for ECG Detection.

Prajuab Pawarangkoon, Chutham Sawigun

Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019

A 0.672 μW, 2 μVrms CMOS Current-Feeback ECG Pre-amplifier With 77 dB CMRR.

Panlop Pantuprecharat, Suphawat Masaree, Prajuab Pawarangkoon, Chutham Sawigun

Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019

2018

A 0.9-nW, 101-Hz, and 46.3-µV_rms IRN Low-Pass Filter for ECG Acquisition Using FVF Biquads.

Chutham Sawigun, Surachoke Thanapitak

IEEE Trans. Very Large Scale Integr. Syst., 2018

A Subthreshold Buffer-Based Biquadratic Cell and its Application to Biopotential Filter Design.

Surachoke Thanapitak, Chutham Sawigun

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A 1.5 V 5.2 nW 60 dB-DR Lowpass Filter With Self-Compansated Gain in 0.35 μm CMOS Suitable for Biomedical Applications.

Surachoke Thanapitak, Chutham Sawigun

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A Compact Bulk-Driven Four-Quadrant Analog Multiplier in Weak Inversion.

Prajuab Pawarangkoon, Chutham Sawigun

Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

2017

A Flipped Voltage Follower Second-Order Bandpass Filter.

Surachoke Thanapitak, Prajuab Pawarangkoon, Chutham Sawigun

J. Circuits Syst. Comput., 2017

2016

0.6-V, Sub-nW, second-order lowpass filters using flipped voltage followers.

Chutham Sawigun, Prajuab Pawarangkoon

Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

2014

A 0.5-V, 2-nW, 55-dB DR, fourth-order bandpass filter using single branch biquads: An efficient design for FoM enhancement.

Chutham Sawigun, Wannaya Ngamkham, Wouter A. Serdijn

Microelectron. J., 2014

2013

A switched gain cell parametric amplifier.

Chutham Sawigun, Amorn Jiraseree-amornkun

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012

A Compact Rail-to-Rail Class-AB CMOS Buffer With Slew-Rate Enhancement.

Chutham Sawigun, Andreas Demosthenous, Xiao Liu, Wouter A. Serdijn

IEEE Trans. Circuits Syst. II Express Briefs, 2012

A modular transconductance reduction technique for very low-frequency Gm-C filters.

Chutham Sawigun, Wouter A. Serdijn

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A 2.6nW, 0.5V, 52dB-DR, 4^th-order Gm-C BPF: Moving closer to the FoM's fundamental limit.

Chutham Sawigun, Wannaya Ngamkham, Wouter A. Serdijn

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A 0.45nW, 0.5V, 59-dB DR, Gm-C Low-pass Filter for Portable ECG Recording.

Chutham Sawigun, Senad Hiseni, Wouter A. Serdijn

Proceedings of the BIODEVICES 2012 - Proceedings of the International Conference on Biomedical Electronics and Devices, Vilamoura, Algarve, Portugal, 1, 2012

2011

Analysis and Design of a Low-Voltage, Low-Power, High-Precision, Class-AB Current-Mode Subthreshold CMOS Sample and Hold Circuit.

Chutham Sawigun, Wouter A. Serdijn

IEEE Trans. Circuits Syst. I Regul. Pap., 2011

2010

A 24nW, 0.65-V, 74-dB SNDR, 83-dB DR, class-AB current-mode sample and hold circuit.

Chutham Sawigun, Wouter A. Serdijn

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A wide-input linear range sub-threshold transconductor for sub-Hz filtering.

Chutham Sawigun, Dipankar Pal, Andreas Demosthenous

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Analog complex gammatone filter for cochlear implant channels.

Wannaya Ngamkham, Chutham Sawigun, Senad Hiseni, Wouter A. Serdijn

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009

Nanopower Sampled Data Wavelet Filter Design using Switched Gain Cell Technique.

Chutham Sawigun, Michiel Grashuis, Ralf L. M. Peeters, Wouter A. Serdijn

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A nano-power class-AB current multiplier for energy-based action potential detector.

Chutham Sawigun, Wouter A. Serdijn

Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

Dynamic translinear nonlinear energy operator.

Senad Hiseni, Chutham Sawigun, Wouter A. Serdijn

Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

2008

A 1.5V, wide-input range, high-bandwidth, CMOS four-quadrant analog multiplier.

Chutham Sawigun, Jirayuth Mahattanakul

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007

A Compact High Current Efficiency Low-Voltage MOS Transconductor with Nearly Constant Input Voltage Range.

Chutham Sawigun, Jirayuth Mahattanakul

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A low-power CMOS analog voltage buffer using compact adaptive biasing.

Chutham Sawigun, Jirayuth Mahattanakul, Andreas Demosthenous, Dipankar Pal

Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

A low-voltage, low-power, high-linearity cmos four-quadrant analog multiplier.

Chutham Sawigun, Andreas Demosthenous, Dipankar Pal

Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

2006

A low-voltage CMOS linear transconductor suitable for analog multiplier application.

Chutham Sawigun, Jirayuth Mahattanakul

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006