Chung-Wen Huang

According to our database1, Chung-Wen Huang authored at least 14 papers between 2004 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2021
Support Convolution of CNN with Compression Sparse Matrix Multiplication Flow in TVM.
Proceedings of the ICPP Workshops 2021: 50th International Conference on Parallel Processing, 2021

2019
Sparse-Matrix Compression Primitives with OpenCL Framework to Support Halide.
Proceedings of the International Workshop on OpenCL, 2019

Accelerate DNN Performance with Sparse Matrix Compression in Halide.
Proceedings of the 48th International Conference on Parallel Processing, 2019

2015
The Design and Experiments of A SID-Based Power-Aware Simulator for Embedded Multicore Systems.
ACM Trans. Design Autom. Electr. Syst., 2015

2014
Compiler Optimization for Reducing Leakage Power in Multithread BSP Programs.
ACM Trans. Design Autom. Electr. Syst., 2014

2010
Programming model and tools for embedded multicore systems.
Int. J. Embed. Syst., 2010

Power aware SID-based simulator for embedded multicore DSP subsystems.
Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010

2009
Configurable SID-based multi-core simulators for embedded system education.
Proceedings of the 2009 Workshop on Embedded Systems Education, 2009

Support of Paged Register Files for Improving Context Switching on Embedded Processors.
Proceedings of the 12th IEEE International Conference on Computational Science and Engineering, 2009

2007
Compilation for compact power-gating controls.
ACM Trans. Design Autom. Electr. Syst., 2007

Energy-aware scheduling and simulation methodologies for parallel security processors with multiple voltage domains.
J. Supercomput., 2007

2005
A sink-n-hoist framework for leakage power reduction.
Proceedings of the EMSOFT 2005, 2005

System-level design space exploration for security processor prototyping in analytical approaches.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004
Power-Aware Scheduling for Parallel Security Processors with Analytical Models.
Proceedings of the Languages and Compilers for High Performance Computing, 2004


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