Chung-Wei Hsu

Orcid: 0009-0009-0791-8133

According to our database1, Chung-Wei Hsu authored at least 7 papers between 2015 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A 14b 16GS/s Time-Interleaving Oirect-RF Synthesis OAe with T-OEM Achieving -70dBc IM3 up to 7.8GHz in 7nm.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A Novel Reversible Data Hiding Method with Contrast Enhancement for Color Medical Images.
Proceedings of the 7th International Conference on Medical and Health Informatics, 2023

2021
VSA: Reconfigurable Vectorwise Spiking Neural Network Accelerator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2018
A 12-b 40-MS/s Calibration-Free SAR ADC.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

2017
A 12-bit 40-MS/s calibration-free SAR ADC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
3D resistive RAM cell design for high-density storage class memory - a review.
Sci. China Inf. Sci., 2016

2015
Crossbar array of selector-less TaO<sub>x</sub>/TiO<sub>2</sub> bilayer RRAM.
Microelectron. Reliab., 2015


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