Chung Lam

According to our database¹, Chung Lam authored at least 10 papers between 2011 and 2020.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

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Bibliography

2020

A SPICE Model of Phase Change Memory for Neuromorphic Circuits.

[BibT_eX]

[DOI]

IEEE Access, 2020

2018

Reliability benefits of a metallic liner in confined PCM.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Reliability Physics Symposium, 2018

2017

A Resistance Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100× for Storage Class Memory Applications.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2017

Opportunities for Analog Coding in Emerging Memory Systems.

[BibT_eX]

[DOI]

CoRR, 2017

2016

Training a Probabilistic Graphical Model with Resistive Switching Electronic Synapses.

[BibT_eX]

[DOI]

CoRR, 2016

7.3 A resistance-drift compensation scheme to reduce MLC PCM raw BER by over 100× for storage-class memory applications.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2014

Experimental Demonstration of Array-level Learning with Phase Change Synaptic Devices.

[BibT_eX]

[DOI]

Sukru Burc Eryilmaz

Duygu Kuzum

Rakesh Gnana David Jeyasingh

CoRR, 2014

Brain-like associative learning using a nanoscale non-volatile phase change synaptic device array.

[BibT_eX]

[DOI]

Sukru Burc Eryilmaz

Duygu Kuzum

Rakesh Gnana David Jeyasingh

CoRR, 2014

2011

Phase change memory.

[BibT_eX]

[DOI]

Jing Li

Chung Lam

Sci. China Inf. Sci., 2011

Post-silicon calibration of analog CMOS using phase-change memory cells.

[BibT_eX]

[DOI]

Proceedings of the 37th European Solid-State Circuits Conference, 2011

Chung Lam

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