Chuangguo Wang
Orcid: 0000-0001-5240-9551
According to our database1,
Chuangguo Wang
authored at least 7 papers
between 2019 and 2024.
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Bibliography
2024
Enhanced-Linearity Wideband Full-Duplex Receiver With Shared Self-Interference Canceller.
IEEE Trans. Very Large Scale Integr. Syst., September, 2024
A Wideband Full-Duplex Receiver With Multi-Domain Self-Interference Cancellation Based on Capacitor Stacking Delay and Delay Compensation in Cancellers.
IEEE J. Solid State Circuits, June, 2024
2023
A Tri-Mode Reconfigurable Receiver for GNSS/NB-IoT/BLE With 68-dB HR3 and 60-dB IMRR in 28-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., August, 2023
2021
A 0.2~3.8-GHz Full-Duplex Receiver With More Than 25 dB Self-Interference Cancellation Using a C-DAC-Based Vector Canceller.
IEEE Access, 2021
A 0.9V 0.1-4GHz LNTA in 28-nm CMOS Achieving +11.3dBm IIP3 With Self-loaded Linearization Technique.
Proceedings of the 14th IEEE International Conference on ASIC, 2021
2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
Proceedings of the 13th IEEE International Conference on ASIC, 2019