Chuan-Tung Lin
Orcid: 0000-0002-7345-1916
According to our database1,
Chuan-Tung Lin
authored at least 7 papers
between 2022 and 2024.
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Bibliography
2024
IEEE J. Solid State Circuits, August, 2024
DIMCA: An Area-Efficient Digital In-Memory Computing Macro Featuring Approximate Arithmetic Hardware in 28 nm.
IEEE J. Solid State Circuits, March, 2024
WOLT: Transparent Deployment of ML Workloads on Lightweight Many-Accelerator Architectures.
Proceedings of the 42nd IEEE International Conference on Computer Design, 2024
STAR-SRAM: 43.06-TFLOPS/W, 1.89-TFLOPS/mm<sup>2</sup>, 400-Kb/mm<sup>2</sup> Floating-Point SRAM-Based Digital Computing-in-Memory Macro in 28-nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024
2023
D6CIM: 60.4-TOPS/W, 1.46-TOPS/mm<sup>2</sup>, 1005-Kb/mm<sup>2</sup> Digital 6T-SRAM-Based Compute-in-Memory Macro Supporting 1-to-8b Fixed-Point Arithmetic in 28-nm CMOS.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
iMCU: A 102-μJ, 61-ms Digital In-Memory Computingbased Microcontroller Unit for Edge TinyML.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023
2022
DIMC: 2219TOPS/W 2569F2/b Digital In-Memory Computing Macro in 28nm Based on Approximate Arithmetic Hardware.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022