Christos Ttofis

Orcid: 0000-0001-8788-4053

According to our database1, Christos Ttofis authored at least 19 papers between 2009 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2016
A Low-Cost Real-Time Embedded Stereo Vision System for Accurate Disparity Estimation Based on Guided Image Filtering.
IEEE Trans. Computers, 2016

2015
A Hardware-Efficient Architecture for Accurate Real-Time Disparity Map Estimation.
ACM Trans. Embed. Comput. Syst., 2015

In-field vulnerability analysis of hardware-accelerated computer vision applications.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

Real-Time Obstacle Avoidance for Mobile Robots via Stereoscopic Vision Using Reconfigurable Hardware (Abstract Only).
Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

2014
A high performance hardware architecture for portable, low-power retinal vessel segmentation.
Integr., 2014

High-quality real-time hardware stereo matching based on guided image filtering.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
A hardware architecture for real-time object detection using depth and edge information.
ACM Trans. Embed. Comput. Syst., 2013

Edge-Directed Hardware Architecture for Real-Time Disparity Map Computation.
IEEE Trans. Computers, 2013

A laboratory course on 3D vision for robotic applications.
Proceedings of the 2013 IEEE International Conference on Microelectronic Systems Education, 2013

Hardware acceleration of retinal blood vasculature segmentation.
Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013

2012
Hardware Design Considerations for Edge-Accelerated Stereo Correspondence Algorithms.
VLSI Design, 2012

FPGA-Based Laboratory Assignments for NoC-Based Manycore Systems.
IEEE Trans. Educ., 2012

Towards accurate hardware stereo correspondence: A real-time FPGA implementation of a segmentation-based adaptive support weight algorithm.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
An MPSoC-Based QAM Modulation Architecture with Run-Time Load-Balancing.
EURASIP J. Embed. Syst., 2011

FPGA-Accelerated Object Detection Using Edge Information.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

Depth-directed hardware object detection.
Proceedings of the Design, Automation and Test in Europe, 2011

2010
A reconfigurable MPSoC-based QAM modulation architecture.
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

Towards hardware stereoscopic 3D reconstruction a real-time FPGA computation of the disparity map.
Proceedings of the Design, Automation and Test in Europe, 2010

2009
FPGA-based NoC-driven sequence of lab assignments for manycore systems.
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2009


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