Christos-Savvas Bouganis

Int. J. Comput. Vis., September, 2024

Δ-DiT: A Training-Free Acceleration Method Tailored for Diffusion Transformers.

[BibT_eX]

[DOI]

Yiren Zhao

Tao Chen

CoRR, 2024

Understanding Why Label Smoothing Degrades Selective Classification and How to Fix It.

[BibT_eX]

[DOI]

Olivier Laurent

Gianni Franchi

CoRR, 2024

Latency Driven Spatially Sparse Optimization for Multi-Branch CNNs for Semantic Segmentation.

[BibT_eX]

[DOI]

Georgios Zampokas

Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision Workshops, 2024

HASS: Hardware-Aware Sparsity Search for Dataflow DNN Accelerator.

[BibT_eX]

[DOI]

Cheng Zhang

Jianyi Cheng

Yiren Zhao

Proceedings of the 34th International Conference on Field-Programmable Logic and Applications, 2024

SMOF: Streaming Modern CNNs on FPGAs with Smart Off-Chip Eviction.

[BibT_eX]

[DOI]

Proceedings of the 32nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2024

Auto WS: Automate Weights Streaming in Layer-Wise Pipelined DNN Accelerators.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

A Framework for Designing Scalable Gaussian Belief Propagation Accelerators for use in SLAM.

[BibT_eX]

[DOI]

Omar Sharif

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023

Multiple-Deep Neural Network Accelerators for Next-Generation Artificial Intelligence Systems.

[BibT_eX]

[DOI]

Nicholas D. Lane

Computer, March, 2023

AutoWS: Automate Weights Streaming in Layer-wise Pipelined DNN Accelerators.

[BibT_eX]

[DOI]

CoRR, 2023

Fast Prototyping Next-Generation Accelerators for New ML Models using MASE: ML Accelerator System Exploration.

[BibT_eX]

[DOI]

Jianyi Cheng

Cheng Zhang

Can Xiao

Yiren Zhao

CoRR, 2023

SVD-NAS: Coupling Low-Rank Approximation and Neural Architecture Search.

[BibT_eX]

[DOI]

Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2023

Window-Based Early-Exit Cascades for Uncertainty Estimation: When Deep Ensembles are More Efficient than Single Models.

[BibT_eX]

[DOI]

Proceedings of the IEEE/CVF International Conference on Computer Vision, 2023

SATAY: A Streaming Architecture Toolflow for Accelerating YOLO Models on FPGA Devices.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field Programmable Technology, 2023

Mixed-TD: Efficient Neural Network Accelerator with Layer-Specific Tensor Decomposition.

[BibT_eX]

[DOI]

Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

fpgaHART: A Toolflow for Throughput-Oriented Acceleration of 3D CNNs for HAR onto FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

PASS: Exploiting Post-Activation Sparsity in Streaming Architectures for CNN Acceleration.

[BibT_eX]

[DOI]

Jianyi Cheng

Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

HARFLOW3D: A Latency-Oriented 3D-CNN Accelerator Toolflow for HAR on FPGA Devices.

[BibT_eX]

[DOI]

Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023

ATHEENA: A Toolflow for Hardware Early-Exit Network Automation.

[BibT_eX]

[DOI]

Benjamin Biggs

Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023

FMM-X3D: FPGA-Based Modeling and Mapping of X3D for Human Action Recognition.

[BibT_eX]

[DOI]

Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023

2022

On the Usefulness of Deep Ensemble Diversity for Out-of-Distribution Detection.

[BibT_eX]

[DOI]

CoRR, 2022

Multi-DNN Accelerators for Next-Generation AI Systems.

[BibT_eX]

[DOI]

Nicholas D. Lane

CoRR, 2022

Low-Cost On-device Partial Domain Adaptation (LoCO-PDA): Enabling efficient CNN retraining on edge devices.

[BibT_eX]

[DOI]

CoRR, 2022

Improved Spike-Based Brain-Machine Interface Using Bayesian Adaptive Kernel Smoother and Deep Learning.

[BibT_eX]

[DOI]

Trio Adiono

Ayu Purwarianti

IEEE Access, 2022

Pushing the Efficiency of StereoNet: Exploiting Spatial Sparsity.

[BibT_eX]

[DOI]

Georgios Zampokas

Proceedings of the 17th International Joint Conference on Computer Vision, 2022

MIDAS: Mutual Information Driven Approximate Synthesis.

[BibT_eX]

[DOI]

Sina Boroumand

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

SAMO: Optimised Mapping of Convolutional Neural Networks to Streaming Architectures.

[BibT_eX]

[DOI]

Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

Augmenting Softmax Information for Selective Classification with Out-of-Distribution Data.

[BibT_eX]

[DOI]

Proceedings of the Computer Vision - ACCV 2022, 2022

2021

Non-iterative SDC modulo scheduling for high-level synthesis.

[BibT_eX]

[DOI]

Leandro de Souza Rosa

Microprocess. Microsystems, October, 2021

Performance landscape of resource-constrained platforms targeting DNNs.

[BibT_eX]

[DOI]

Panagiotis Miliadis

CoRR, 2021

Class-specific early exit design methodology for convolutional neural networks.

[BibT_eX]

[DOI]

Appl. Soft Comput., 2021

perf4sight: A toolflow to model CNN training performance on Edge GPUs.

[BibT_eX]

[DOI]

Proceedings of the IEEE/CVF International Conference on Computer Vision Workshops, 2021

StreamSVD: Low-rank Approximation and Streaming Accelerator Co-design.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field-Programmable Technology, 2021

POMMEL: Exploring Off-Chip Memory Energy & Power Consumption in Convolutional Neural Network Accelerators.

[BibT_eX]

[DOI]

Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

DEF: Differential Encoding of Featuremaps for Low Power Convolutional Neural Network Accelerators.

[BibT_eX]

[DOI]

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

Learning Boolean Circuits from Examples for Approximate Logic Synthesis.

[BibT_eX]

[DOI]

Sina Boroumand

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020

Real-Time Servo Press Force Estimation Based on Dual Particle Filter.

[BibT_eX]

[DOI]

Jon Olaizola

Eneko Sáenz de Argandoña

Aitzol Iturrospe

José Manuel Abete

IEEE Trans. Ind. Electron., 2020

Approximate LSTMs for Time-Constrained Inference: Enabling Fast Reaction in Self-Driving Cars.

[BibT_eX]

[DOI]

Michail Rizakis

IEEE Consumer Electron. Mag., 2020

Multi-Precision Policy Enforced Training (MuPPET) : A Precision-Switching Strategy for Quantised Fixed-Point Training of CNNs.

[BibT_eX]

[DOI]

Diederik Adriaan Vink

Proceedings of the 37th International Conference on Machine Learning, 2020

Mapping Multiple LSTM models on FPGAs.

[BibT_eX]

[DOI]

Stefano Ribes

Pedro Trancoso

Proceedings of the International Conference on Field-Programmable Technology, 2020

Caffe Barista: Brewing Caffe with FPGAs in the Training Loop.

[BibT_eX]

[DOI]

Diederik Adriaan Vink

Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

A Throughput-Latency Co-Optimised Cascade of Convolutional Neural Network Classifiers.

[BibT_eX]

[DOI]

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Now that I can see, I can improve: Enabling data-driven finetuning of CNNs on the edge.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2020

A Parameterisable FPGA-Tailored Architecture for YOLOv3-Tiny.

[BibT_eX]

[DOI]

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2020

2019

fpgaConvNet: Mapping Regular and Irregular Convolutional Neural Networks on FPGAs.

[BibT_eX]

[DOI]

IEEE Trans. Neural Networks Learn. Syst., 2019

Scaling Up Modulo Scheduling for High-Level Synthesis.

[BibT_eX]

[DOI]

Leandro de Souza Rosa

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Context-based image acquisition from memory in digital systems.

[BibT_eX]

[DOI]

J. Real Time Image Process., 2019

Understanding of Human Behavior with a Robotic Agent Through Daily Activity Analysis.

[BibT_eX]

[DOI]

Int. J. Soc. Robotics, 2019

Multi-person 3D pose estimation from 3D cloud data using 3D convolutional neural networks.

[BibT_eX]

[DOI]

Manolis Vasileiadis

Comput. Vis. Image Underst., 2019

Towards a Distributed, Chronically-Implantable Neural Interface.

[BibT_eX]

[DOI]

Jinendra Ekanayake

Andrew Jackson

Proceedings of the 2019 9th International IEEE/EMBS Conference on Neural Engineering (NER), 2019

Decoding Hand Kinematics from Local Field Potentials Using Long Short-Term Memory (LSTM) Network.

[BibT_eX]

[DOI]

Proceedings of the 2019 9th International IEEE/EMBS Conference on Neural Engineering (NER), 2019

Towards Efficient On-Board Deployment of DNNs on Intelligent Autonomous Systems.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Informed Region Selection for Efficient UAV-based Object Detectors: Altitude-aware Vehicle Detection with CyCAR Dataset.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2019

Power-Aware FPGA Mapping of Convolutional Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field-Programmable Technology, 2019

Accelerated Approximate Nearest Neighbors Search Through Hierarchical Product Quantization.

[BibT_eX]

[DOI]

Ameer M. S. Abdelhadi

Proceedings of the International Conference on Field-Programmable Technology, 2019

Optimising 3D-CNN Design towards Human Pose Estimation on Low Power Devices.

[BibT_eX]

[DOI]

Manolis Vasileiadis

Georgios Stavropoulos

Proceedings of the 30th British Machine Vision Conference 2019, 2019

End-to-End Hand Kinematic Decoding from LFPs Using Temporal Convolutional Network.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019

A Scalable FPGA-Based Architecture for Depth Estimation in SLAM.

[BibT_eX]

[DOI]

Konstantinos Boikos

Proceedings of the Applied Reconfigurable Computing - 15th International Symposium, 2019

2018

Boosting the Hardware-Efficiency of Cascade Support Vector Machines for Embedded Classification Applications.

[BibT_eX]

[DOI]

Marios M. Polycarpou

Int. J. Parallel Program., 2018

Toolflows for Mapping Convolutional Neural Networks on FPGAs: A Survey and Future Directions.

[BibT_eX]

[DOI]

ACM Comput. Surv., 2018

CascadeCNN: Pushing the Performance Limits of Quantisation in Convolutional Neural Networks.

[BibT_eX]

[DOI]

CoRR, 2018

Deploying Deep Neural Networks in the Embedded Space.

[BibT_eX]

[DOI]

CoRR, 2018

f-CNN<sup>x</sup>: A Toolflow for Mapping Multiple Convolutional Neural Networks on FPGAs.

[BibT_eX]

[DOI]

CoRR, 2018

CascadeCNN: Pushing the performance limits of quantisation.

[BibT_eX]

[DOI]

CoRR, 2018

Learning to Fly by MySelf: A Self-Supervised CNN-Based Approach for Autonomous Navigation.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2018

Scaling Up Loop Pipelining for High-Level Synthesis: A Non-iterative Approach.

[BibT_eX]

[DOI]

Leandro de Souza Rosa

Proceedings of the International Conference on Field-Programmable Technology, 2018

f-CNNx: A Toolflow for Mapping Multiple Convolutional Neural Networks on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

Cascade^CNN: Pushing the Performance Limits of Quantisation in Convolutional Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

Spike Rate Estimation Using Bayesian Adaptive Kernel Smoother (BAKS) and Its Application to Brain Machine Interfaces.

[BibT_eX]

[DOI]

Proceedings of the 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2018

DroNet: Efficient convolutional neural network detector for real-time UAV applications.

[BibT_eX]

[DOI]

George Plastiras

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

An overview of next-generation architectures for machine learning: Roadmap, opportunities and challenges in the IoT era.

[BibT_eX]

[DOI]

Muhammad Shafique

Muhammad Abdullah Hanif

Faiq Khalid

Rehan Hafiz

Semeen Rehman

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Approximate FPGA-Based LSTMs Under Computation Time Constraints.

[BibT_eX]

[DOI]

Michalis Rizakis

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

2017

An Unbiased MCMC FPGA-Based Accelerator in the Land of Custom Precision Arithmetic.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2017

Special issue on applied reconfigurable computing.

[BibT_eX]

[DOI]

Marek Gorgon

Microprocess. Microsystems, 2017

Particle MCMC algorithms and architectures for accelerating inference in state-space models.

[BibT_eX]

[DOI]

Leonardo Bottolo

Int. J. Approx. Reason., 2017

fpgaConvNet: A Toolflow for Mapping Diverse Convolutional Neural Networks on Embedded FPGAs.

[BibT_eX]

[DOI]

CoRR, 2017

Robust Human Pose Tracking For Realistic Service Robot Applications.

[BibT_eX]

[DOI]

Manolis Vasileiadis

Sotiris Malassiotis

Dimitrios Giakoumis

Proceedings of the 2017 IEEE International Conference on Computer Vision Workshops, 2017

Latency-driven design for FPGA-based convolutional neural networks.

[BibT_eX]

[DOI]

Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

A high-performance system-on-chip architecture for direct tracking for SLAM.

[BibT_eX]

[DOI]

Konstantinos Boikos

Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

fpgaConvNet: Automated Mapping of Convolutional Neural Networks on FPGAs (Abstract Only).

[BibT_eX]

[DOI]

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

Communication-Aware MCMC Method for Big Data Applications on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017

2016

Embedded Hardware-Efficient Real-Time Classification With Cascade Support Vector Machines.

[BibT_eX]

[DOI]

Marios M. Polycarpou

IEEE Trans. Neural Networks Learn. Syst., 2016

Population-Based MCMC on Multi-Core CPUs, GPUs and FPGAs.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2016

A hybrid ASIC/FPGA fault-tolerant artificial pancreas.

[BibT_eX]

[DOI]

Michail S. Vavouras

Antonino Armato

Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

Area-driven partial reconfiguration for SEU mitigation on SRAM-based FPGAs.

[BibT_eX]

[DOI]

Michail S. Vavouras

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

FPGASVM: A Framework for Accelerating Kernelized Support Vector Machine.

[BibT_eX]

[DOI]

Mudhar Bin Rabieah

Proceedings of the 5th International Workshop on Big Data, 2016

Variation-Aware Optimisation for Reconfigurable Cyber-Physical Systems.

[BibT_eX]

[DOI]

Proceedings of the Technological Innovation for Cyber-Physical Systems, 2016

Semi-dense SLAM on an FPGA SoC.

[BibT_eX]

[DOI]

Konstantinos Boikos

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

fpgaConvNet: A Framework for Mapping Convolutional Neural Networks on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

2015

ARC 2014: A Multidimensional FPGA-Based Parallel DBSCAN Architecture.

[BibT_eX]

[DOI]

Neil Scicluna

ACM Trans. Reconfigurable Technol. Syst., 2015

ARC 2014 Over-Clocking KLT Designs on FPGAs under Process, Voltage, and Temperature Variation.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2015

An exact MCMC accelerator under custom precision regimes.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Conference on Field Programmable Technology, 2015

Towards heterogeneous solvers for large-scale linear systems.

[BibT_eX]

[DOI]

Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

FPGA based nonlinear Support Vector Machine training using an ensemble learning.

[BibT_eX]

[DOI]

Mudhar Bin Rabieah

Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

Robust multi-image based blind face hallucination.

[BibT_eX]

[DOI]

Yonggang Jin

Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2015

2014

Vision-Based Egomotion Estimation on FPGA for Unmanned Aerial Vehicle Navigation.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. Video Technol., 2014

Kernel-based Adaptive Image Sampling.

[BibT_eX]

[DOI]

Proceedings of the VISAPP 2014, 2014

Zero-latency datapath error correction framework for over-clocking DSP applications on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

Memory optimisation for hardware induction of axis-parallel decision tree.

[BibT_eX]

[DOI]

Chuan Cheng

Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

Over-clocking of Linear Projection Designs through Device Specific Optimisations.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

Parallel resampling for particle filters on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014

Pushing the performance boundary of linear projection designs through device specific optimisations (abstract only).

[BibT_eX]

[DOI]

Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014

Image progressive acquisition for hardware systems.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

DeSyRe: On-Demand Adaptive and Reconfigurable Fault-Tolerant SoCs.

[BibT_eX]

[DOI]

Christos Strydis

Antonino Armato

Georgi Nedeltchev Gaydadjiev

Babak Falsafi

Dimitris Theodoropoulos

Stavros Tzilis

Michalis Vavouras

Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014

FPGA-Based Parallel DBSCAN Architecture.

[BibT_eX]

[DOI]

Neil Scicluna

Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014

A Unified Framework for Over-Clocking Linear Projections on FPGAs under PVT Variation.

[BibT_eX]

[DOI]

Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014

2013

DeSyRe: On-demand system reliability.

[BibT_eX]

[DOI]

Christos Strydis

Antonino Armato

Georgi Nedeltchev Gaydadjiev

Babak Falsafi

Sebastián Isaza

Alirad Malek

R. Mariani

Dimitris Theodoropoulos

Stavros Tzilis

Michalis Vavouras

Microprocess. Microsystems, 2013

Guest editorial: Workshop on Reconfigurable Computing.

[BibT_eX]

[DOI]

Miquel Pericàs

J. Syst. Archit., 2013

High-level power and performance estimation of FPGA-based soft processors and its application to design space exploration.

[BibT_eX]

[DOI]

J. Syst. Archit., 2013

An embedded hardware-efficient architecture for real-time cascade Support Vector Machine classification.

[BibT_eX]

[DOI]

Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013

Face hallucination revisited: A joint framework.

[BibT_eX]

[DOI]

Yonggang Jin

Proceedings of the IEEE International Conference on Image Processing, 2013

A hardware-efficient architecture for embedded real-time cascaded support vector machines classification.

[BibT_eX]

[DOI]

Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013

Domain-specific progressive sampling of face images.

[BibT_eX]

[DOI]

Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013

Accelerating Random Forest training process using FPGA.

[BibT_eX]

[DOI]

Chuan Cheng

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

FPGA-based acceleration of cascaded support vector machines for embedded applications (abstract only).

[BibT_eX]

[DOI]

Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

On Optimizing the Arithmetic Precision of MCMC Algorithms.

[BibT_eX]

[DOI]

Farhan Rahman

Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

2012

Novel Cascade FPGA Accelerator for Support Vector Machines Classification.

[BibT_eX]

[DOI]

IEEE Trans. Neural Networks Learn. Syst., 2012

Early performance estimation of image compression methods on soft processors.

[BibT_eX]

[DOI]

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

High-level linear projection circuit design optimization framework for FPGAs under over-clocking.

[BibT_eX]

[DOI]

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

A Custom Precision Based Architecture for Accelerating Parallel Tempering MCMC on FPGAs without Introducing Sampling Error.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

The DeSyRe Project: On-Demand System Reliability.

[BibT_eX]

[DOI]

Christos Strydis

Georgi Nedeltchev Gaydadjiev

Babak Falsafi

Alirad Malek

R. Mariani

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Parallel Tempering MCMC Acceleration Using Reconfigurable Hardware.

[BibT_eX]

[DOI]

Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2012

2011

Blur identification with assumption validation for sensor-based video reconstruction and its implementation on field programmable gate array.

[BibT_eX]

[DOI]

IET Comput. Digit. Tech., 2011

Feature selection with geometric constraints for vision-based Unmanned Aerial Vehicle navigation.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Conference on Image Processing, 2011

An FPGA-based object detector with dynamic workload balancing.

[BibT_eX]

[DOI]

Chuan Cheng

Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

A Run-Time Adaptive FPGA Architecture for Monte Carlo Simulations.

[BibT_eX]

[DOI]

Xiang Tian

Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

2010

Exploration of Heterogeneous FPGAs for Mapping Linear Projection Designs.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2010

An Optimized Hardware Architecture of a Multivariate Gaussian Random Number Generator.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2010

A Salient Region Detector for GPU Using a Cellular Automata Architecture.

[BibT_eX]

[DOI]

David Huw Jones

Proceedings of the Neural Information Processing. Models and Applications, 2010

A novel FPGA-based SVM classifier.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field-Programmable Technology, 2010

Mapping Multiple Multivariate Gaussian Random Number Generators on an FPGA.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

GPU Versus FPGA for High Productivity Computing.

[BibT_eX]

[DOI]

David Huw Jones

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

A Heterogeneous FPGA Architecture for Support Vector Machine Training.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010

Design of a Financial Application Driven Multivariate Gaussian Random Number Generator for an FPGA.

[BibT_eX]

[DOI]

Proceedings of the Reconfigurable Computing: Architectures, 2010

2009

Introduction to the Special Issue ARC'08.

[BibT_eX]

[DOI]

Katherine Compton

Roger F. Woods

Pedro C. Diniz

ACM Trans. Reconfigurable Technol. Syst., 2009

Synthesis and Optimization of 2D Filter Designs for Heterogeneous FPGAs.

[BibT_eX]

[DOI]

Sung-Boem Park

ACM Trans. Reconfigurable Technol. Syst., 2009

Robust Real-Time Super-Resolution on FPGA and an Application to Video Enhancement.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2009

Hardware architectures for eigenvalue computation of real symmetric matrices.

[BibT_eX]

[DOI]

IET Comput. Digit. Tech., 2009

A sensor-based approach to linear blur identification for real-time video enhancement.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Image Processing, 2009

Tracking performance of a foveated vision system.

[BibT_eX]

[DOI]

Donald G. Bailey

Proceedings of the 4th International Conference on Autonomous Robots and Agents, 2009

Implementation of a foveal vision mapping.

[BibT_eX]

[DOI]

Donald G. Bailey

Proceedings of the 2009 International Conference on Field-Programmable Technology, 2009

Word-Length Optimization and Error Analysis of a Multivariate Gaussian Random Number Generator.

[BibT_eX]

[DOI]

Proceedings of the Reconfigurable Computing: Architectures, 2009

2008

Video enhancement on an adaptive image sensor.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Image Processing, 2008

A scalable FPGA architecture for non-linear SVM training.

[BibT_eX]

[DOI]

Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008

Efficient FPGA mapping of Gilbert's algorithm for SVM training on large-scale classification problems.

[BibT_eX]

[DOI]

Proceedings of the FPL 2008, 2008

Real-time image super resolution using an FPGA.

[BibT_eX]

[DOI]

Oliver Bowen

Proceedings of the FPL 2008, 2008

Multivariate Gaussian Random Number Generator Targeting Specific Resource Utilization in an FPGA.

[BibT_eX]

[DOI]

Proceedings of the Reconfigurable Computing: Architectures, 2008

FPGA-based Real-time Super-Resolution on an Adaptive Image Sensor.

[BibT_eX]

[DOI]

Proceedings of the Reconfigurable Computing: Architectures, 2008

2007

Real-time hardware acceleration of the trace transform.

[BibT_eX]

[DOI]

Suhaib A. Fahmy

Wayne Luk

J. Real Time Image Process., 2007

Efficient mapping of a Kalman filter into an FPGA using Taylor Expansion.

[BibT_eX]

[DOI]

Proceedings of the FPL 2007, 2007

Efficient Mapping of Dimensionality Reduction Designs onto Heterogeneous FPGAs.

[BibT_eX]

[DOI]

Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

2006

A Spatiotemporal Saliency Framework.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Image Processing, 2006

A statistical framework for dimensionality reduction implementation in FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006

An FPGA implementation of the simplex algorithm.

[BibT_eX]

[DOI]

Samuel Bayliss

Wayne Luk

Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006

Efficient Realtime FPGA Implementation of the Trace Transform.

[BibT_eX]

[DOI]

Suhaib A. Fahmy

Wayne Luk

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

FPGA-Accelerated Pre-Attentive Segmentation in Primary Visual Cortex.

[BibT_eX]

[DOI]

Zhaoping Li

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Hardware efficient architectures for Eigenvalue computation.

[BibT_eX]

[DOI]

Philip Heng Wai Leong

Stephen J. Motley

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005

A novel 2D filter design methodology.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

FPGA-Accelerated Reconstruction of Gene Regulatory Networks.

[BibT_eX]

[DOI]

Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Heterogeneity Exploration for Multiple 2D Filter Designs.

[BibT_eX]

[DOI]

Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

A Novel 2D Filter Design Methodology for Heterogeneous Devices.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

2004

Multiple light source detection with application to face recognition.

[BibT_eX]

[DOI]

PhD thesis, 2004

Multiple Light Source Detection.

[BibT_eX]

[DOI]

Mike Brookes

IEEE Trans. Pattern Anal. Mach. Intell., 2004

A Steerable Complex Wavelet Construction and Its Implementation on FPGA.

[BibT_eX]

[DOI]

Jeffrey Ng

Anil A. Bharath

Proceedings of the Field Programmable Logic and Application, 2004

2003

Class-based Multiple Light Detection: An Application to Faces.

[BibT_eX]

[DOI]