Christos Papameletis

According to our database1, Christos Papameletis authored at least 10 papers between 2010 and 2022.

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Bibliography

2022
PPA Optimization of Test Points in Automotive Designs.
Proceedings of the IEEE International Test Conference, 2022

2019
Optimized Physical DFT Synthesis of Unified Compression and LBIST for Automotive Applications.
Proceedings of the IEEE International Test Conference, 2019

2018
On-Chip Toggle Generators to Provide Realistic Conditions during Test of Digital 2D-SoCs and 3D-SICs.
Proceedings of the IEEE International Test Conference, 2018

2017
Embedded toggle generator to control the switching activity during test of digital 2D-SoCs and 3D-SICs.
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017

Advancing test compression to the physical dimension.
Proceedings of the IEEE International Test Conference, 2017

2015
A DfT Architecture and Tool Flow for 3-D SICs With Test Data Compression, Embedded Cores, and Multiple Towers.
IEEE Des. Test, 2015

At-Speed Testing of Inter-Die Connections of 3D-SICs in the Presence of Shore Logic.
Proceedings of the 24th IEEE Asian Test Symposium, 2015

2014
Vesuvius-3D: A 3D-DfT demonstrator.
Proceedings of the 2014 International Test Conference, 2014

2013
Automated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers.
Proceedings of the 18th IEEE European Test Symposium, 2013

2010
A Temperature-Aware Time-Dependent Dielectric Breakdown Analysis Framework.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2010


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