Christos Kotselidis

Orcid: 0000-0002-8146-3503

According to our database1, Christos Kotselidis authored at least 59 papers between 2008 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Programming Heterogeneous Hardware via Managed Runtime Systems
Springer Briefs in Computer Science, Springer, ISBN: 978-3-031-49558-8, 2024

Towards GPU Accelerated FHE Computations.
Proceedings of the IEEE International Conference on Cyber Security and Resilience, 2024

2023
TornadoQSim: An Open-source High-Performance and Modular Quantum Circuit Simulation Framework.
CoRR, 2023

Experiences in Building a Composable and Functional API for Runtime SPIR-V Code Generation.
CoRR, 2023

Accelerating Java Ray Tracing Applications on Heterogeneous Hardware.
CoRR, 2023

Beehive SPIR-V Toolkit: A Composable and Functional API for Runtime SPIR-V Code Generation.
Proceedings of the 15th ACM SIGPLAN International Workshop on Virtual Machines and Intermediate Languages, 2023

Cross-Language Interoperability of Heterogeneous Code.
Proceedings of the Companion Proceedings of the 7th International Conference on the Art, 2023

A Multifaceted Memory Analysis of Java Benchmarks.
Proceedings of the 20th ACM SIGPLAN International Conference on Managed Programming Languages and Runtimes, 2023

Unified Shared Memory: Friend or Foe? Understanding the Implications of Unified Memory on Managed Heaps.
Proceedings of the 20th ACM SIGPLAN International Conference on Managed Programming Languages and Runtimes, 2023

Scaling Up Performance of Managed Applications on NUMA Systems.
Proceedings of the 2023 ACM SIGPLAN International Symposium on Memory Management, 2023

A Practical and Scalable Privacy-preserving Framework.
Proceedings of the IEEE International Conference on Cyber Security and Resilience, 2023

Providing Security Assurance & Hardening for Open Source Software/Hardware: The SecOPERA approach.
Proceedings of the 28th IEEE International Workshop on Computer Aided Modeling and Design of Communication Links and Networks , 2023

2022
Just-In-Time Compilation on ARM - A Closer Look at Call-Site Code Consistency.
ACM Trans. Archit. Code Optim., 2022

Enabling Transparent Acceleration of Big Data Frameworks using Heterogeneous Hardware.
Proc. VLDB Endow., 2022

Enabling pipeline parallelism in heterogeneous managed runtime environments via batch processing.
Proceedings of the VEE '22: 18th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, 2022

2021
Transparent Compiler and Runtime Specializations for Accelerating Managed Languages on FPGAs.
Art Sci. Eng. Program., 2021

NUMAscope: Capturing and Visualizing Hardware Metrics on Large ccNUMA Systems.
CoRR, 2021

Multiple-tasks on multiple-devices (MTMD): exploiting concurrency in heterogeneous managed runtimes.
Proceedings of the VEE '21: 17th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, 2021

Automatically exploiting the memory hierarchy of GPUs through just-in-time compilation.
Proceedings of the VEE '21: 17th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, 2021

2020
FastPath_MP: Low Overhead & Energy-efficient FPGA-based Storage Multi-paths.
ACM Trans. Archit. Code Optim., 2020

Towards High Performance Java-based Deep Learning Frameworks.
CoRR, 2020

Running parallel bytecode interpreters on heterogeneous hardware.
Proceedings of the Programming'20: 4th International Conference on the Art, 2020

Transparent acceleration of Java-based deep learning engines.
Proceedings of the MPLR '20: 17th International Conference on Managed Programming Languages and Runtimes, 2020

You can't hide you can't run: a performance assessment of managed applications on a NUMA machine.
Proceedings of the MPLR '20: 17th International Conference on Managed Programming Languages and Runtimes, 2020

Efficient Compilation and Execution of JVM-Based Data Processing Frameworks on Heterogeneous Co-Processors.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
Dynamic application reconfiguration on heterogeneous hardware.
Proceedings of the 15th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, 2019

An analysis of call-site patching without strong hardware support for self-modifying-code.
Proceedings of the 16th ACM SIGPLAN International Conference on Managed Programming Languages and Runtimes, 2019

Demystifying Crypto-Mining: Analysis and Optimizations of Memory-Hard PoW Algorithms.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2019

Towards Prototyping and Acceleration of Java Programs onto Intel FPGAs.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

Simulating Wear-out Effects of Asymmetric Multicores at the Architecture Level.
Proceedings of the 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2019

2018
Type Information Elimination from Objects on Architectures with Tagged Pointers Support.
IEEE Trans. Computers, 2018

Navigating the Landscape for Real-Time Localization and Mapping for Robotics and Virtual and Augmented Reality.
Proc. IEEE, 2018

Navigating the Landscape for Real-time Localisation and Mapping for Robotics and Virtual and Augmented Reality.
CoRR, 2018

On the future of research VMs: a hardware/software perspective.
Proceedings of the Conference Companion of the 2nd International Conference on Art, 2018

Towards practical heterogeneous virtual machines.
Proceedings of the Conference Companion of the 2nd International Conference on Art, 2018

Exploiting high-performance heterogeneous hardware for Java programs using graal.
Proceedings of the 15th International Conference on Managed Languages & Runtimes, 2018

Using compiler snippets to exploit parallelism on heterogeneous hardware: a Java reduction case study.
Proceedings of the 10th ACM SIGPLAN International Workshop on Virtual Machines and Intermediate Languages, 2018

FastPath: Towards Wire-Speed NVMe SSDs.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

Challenges and Proposals for Enabling Dynamic Heterogeneous Execution of Big Data Frameworks.
Proceedings of the 2018 IEEE International Conference on Cloud Computing Technology and Science, 2018

2017
Heterogeneous Managed Runtime Systems: A Computer Vision Case Study.
Proceedings of the 13th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, 2017

Experiences with Building Domain-Specific Compilation Plugins in Graal.
Proceedings of the 14th International Conference on Managed Languages and Runtimes, 2017

Cross-ISA debugging in meta-circular VMs.
Proceedings of the 9th ACM SIGPLAN International Workshop on Virtual Machines and Intermediate Languages, Vancouver, BC, Canada, October 23, 2017

MaxSim: A simulation platform for managed applications.
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017


Boosting Java Performance Using GPGPUs.
Proceedings of the Architecture of Computing Systems - ARCS 2017, 2017

2016
Towards co-designed optimizations in parallel frameworks: a MapReduce case study.
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016

Integrating Algorithmic Parameters into Benchmarking and Design Space Exploration in 3D Scene Understanding.
Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

2011
Transaction Reordering to Reduce Aborts in Software Transactional Memory.
Trans. High Perform. Embed. Archit. Compil., 2011

Robust Adaptation to Available Parallelism in Transactional Memory Applications.
Trans. High Perform. Embed. Archit. Compil., 2011

2010
Clustering JVMs with software transactional memory support.
Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

Improving Performance by Reducing Aborts in Hardware Transactional Memory.
Proceedings of the High Performance Embedded Architectures and Compilers, 2010

2009
Profiling Transactional Memory Applications.
Proceedings of the 17th Euromicro International Conference on Parallel, 2009

On the Performance of Contention Managers for Complex Transactional Memory Benchmarks.
Proceedings of the Eighth International Symposium on Parallel and Distributed Computing, 2009

Steal-on-Abort: Improving Transactional Memory Performance through Dynamic Transaction Reordering.
Proceedings of the High Performance Embedded Architectures and Compilers, 2009

2008
Experiences using adaptive concurrency in transactional memory with Lee's routing algorithm.
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2008

Investigating software Transactional Memory on clusters.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

DiSTM: A Software Transactional Memory Framework for Clusters.
Proceedings of the 2008 International Conference on Parallel Processing, 2008

Lee-TM: A Non-trivial Benchmark Suite for Transactional Memory.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2008

Advanced Concurrency Control for Transactional Memory Using Transaction Commit Rate.
Proceedings of the Euro-Par 2008, 2008


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