Christopher Bailey

Orcid: 0000-0003-0634-320X

Affiliations:
  • University of York, UK


According to our database1, Christopher Bailey authored at least 29 papers between 1994 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Online presence:

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Bibliography

2022
Investigating Novel 3D Modular Schemes for Large Array Topologies: Power Modeling and Prototype Feasibility.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

2019
A 65-nm CMOS Lossless Bio-Signal Compression Circuit With 250 FemtoJoule Performance Per Bit.
IEEE Trans. Biomed. Circuits Syst., 2019

Miniature Untethered EEG Recorder Improves Advanced Neuroscience Methodologies.
IEEE Trans. Biomed. Circuits Syst., 2019

2018
Performance Analysis of a 3D Wireless Massively Parallel Computer.
J. Sens. Actuator Networks, 2018

2015
Evaluating 3D wireless grids as parallel platforms.
Int. J. Ad Hoc Ubiquitous Comput., 2015

A lossless data reduction technique for wireless EEG recorders and its use in selective data filtering for seizure monitoring.
Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015

2014
Investigation of a Superscalar Operand Stack Using FO4 and ASIC Wire-Delay Metrics.
VLSI Design, 2014

2009
Re-evaluation of the role of the processor within embedded multiprocessor systems.
Proceedings of the IADIS International Conference Applied Computing 2009, 2009

A JAVA bread-board simulator digital circuit simulation with an extensible e-learning tool.
Proceedings of the IADIS International Conference Applied Computing 2009, 2009

2008
Real-time human action recognition on an embedded, reconfigurable video processing architecture.
J. Real Time Image Process., 2008

2007
Practical single view metrology for cuboids.
Proceedings of the VISAPP 2007: Proceedings of the Second International Conference on Computer Vision Theory and Applications, Barcelona, Spain, March 8-11, 2007, 2007

Motion Feature Combination for Human Action Recognition in Video.
Proceedings of the Computer Vision and Computer Graphics. Theory and Applications, 2007

Motion information combination for fast human action recognition.
Proceedings of the VISAPP 2007: Proceedings of the Second International Conference on Computer Vision Theory and Applications, Barcelona, Spain, March 8-11, 2007, 2007

A Human Action Recognition System for Embedded Computer Vision Application.
Proceedings of the 2007 IEEE Computer Society Conference on Computer Vision and Pattern Recognition (CVPR 2007), 2007

2006
Human Action Classification Using SVM_2K Classifier on Motion Features.
Proceedings of the Multimedia Content Representation, 2006

2005
Combined simulator statistics and block code sampling to study performance enhancement of microarchitecture.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

Developing ubiquitous computing applications.
Proceedings of the AC 2005, 2005

Instruction level parallelism of stack-code under varied issue widths, and one-level branch prediction.
Proceedings of the AC 2005, 2005

2004
Investigating Available Instruction Level Parallelism for Stack Based Machine Architectures.
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

A Proposed Mechanism for Super-Pipelined Instruction-Issue for ILP Stack Machines.
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

A Mechanism for Implementing Precise Exceptions in Pipelined Processors.
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

Compiler-Directed Dynamic Memory Disambiguation for Loop Structures.
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

2002
Congestion Sensitive Algorithm for Point-to-Multipoint Multicast Congestion Control in ATM Networks.
Proceedings of the ISCA 17th International Conference Computers and Their Applications, 2002

2000
Continuous Discrete-Event Simulation of a Continuous-Media Server I/O Subsystem.
Proceedings of the 26th EUROMICRO 2000 Conference, 2000

On ATM Cell Batching and Its Effects on Bus Arbitration in a Conventional Multimedia Server.
Proceedings of the 26th EUROMICRO 2000 Conference, 2000

Achieving Minimal and Deterministic Interrupt Execution in Stack-Based Processor Architectures.
Proceedings of the 26th EUROMICRO 2000 Conference, 2000

1999
An Investigation of Arbitration in Servers for Distributed Multimedia Applications.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1999

An Assessment of Shared Local Memory Buffering for Enhanced Multimedia Server Scalability.
Proceedings of the Internet, Multimedia Systems and Applications, 1999

1994
HLL enhancement for stack based processors.
Microprocess. Microprogramming, 1994


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