Christophe Guillon

Orcid: 0000-0001-8308-8682

According to our database1, Christophe Guillon authored at least 19 papers between 2000 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Performance bottlenecks detection through microarchitectural sensitivity.
CoRR, 2024

EasyTracker: A Python Library for Controlling and Inspecting Program Execution.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2024

2023
Autotuning Convolutions Is Easier Than You Think.
ACM Trans. Archit. Code Optim., June, 2023

2022
PALMED: Throughput Characterization for Superscalar Architectures.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2022

2021
Reconciling optimization with secure compilation.
Proc. ACM Program. Lang., 2021

Secure Optimization Through Opaque Observations.
CoRR, 2021

2020
Building a Polyhedral Representation from an Instrumented Execution: Making Dynamic Analyses of Nonaffine Programs Scalable.
ACM Trans. Archit. Code Optim., 2020

From micro-OPs to abstract resources: constructing a simpler CPU performance model through microbenchmarking.
CoRR, 2020

2019
Data-flow/dependence profiling for structured transformations.
Proceedings of the 24th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2019

2015
Collective Mind, Part II: Towards Performance- and Cost-Aware Software Engineering as a Natural Science.
CoRR, 2015

2011
Decoupled graph-coloring register allocation with hierarchical aliasing.
Proceedings of the 14th International Workshop on Software and Compilers for Embedded Systems, 2011

Dynamic Elimination of Overflow Tests in a Trace Compiler.
Proceedings of the Compiler Construction - 20th International Conference, 2011

2010
Parallel copy motion.
Proceedings of the 13th International Workshop on Software and Compilers for Embedded Systems, 2010

Compilation and virtualization in the HiPEAC vision.
Proceedings of the 47th Design Automation Conference, 2010

2009
Revisiting Out-of-SSA Translation for Correctness, Code Quality and Efficiency.
Proceedings of the CGO 2009, 2009

2006
Register Allocation: What Does the NP-Completeness Proof of Chaitin et al. Really Prove? Or Revisiting Register Allocation: Why and How.
Proceedings of the Languages and Compilers for Parallel Computing, 2006

2005
Procedure placement using temporal-ordering information: Dealing with code size expansion.
J. Embed. Comput., 2005

2004
Optimizing Translation Out of SSA Using Renaming Constraints.
Proceedings of the 2nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2004), 2004

2000
Code generator optimizations for the ST120 DSP-MCU core.
Proceedings of the 2000 International Conference on Compilers, 2000


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