Christoph Thomas Muller

According to our database, Christoph Thomas Muller authored at least 5 papers between 2013 and 2019.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2019

Minimum Energy Point in Constant Frequency Designs under Adaptive Supply Voltage and Body Bias Adjustment in 55 nm DDC.

Christoph Thomas Müller, Marc Pons, David Ruffieux, Jean-Luc Nagel, Stéphane Emery, Andreas Burg, Shuuji Tanahashi, Yoshitaka Tanaka, Atsushi Takeuchi

Proceedings of the 15th Conference on Ph.D. Research in Microelectronics and Electronics, 2019

A 0.5 V 2.5 μW/MHz Microcontroller with Analog-Assisted Adaptive Body Bias PVT Compensation with 3.13nW/kB SRAM Retention in 55nm Deeply-Depleted Channel CMOS.

Marc Pons, Christoph Thomas Müller, David Ruffieux, Jean-Luc Nagel, Stéphane Emery, Andreas Burg, Shuuji Tanahashi, Yoshitaka Tanaka, Atsushi Takeuchi

Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

2016

Argo: A Real-Time Network-on-Chip Architecture With an Efficient GALS Implementation.

Evangelia Kasapaki, Martin Schoeberl, Rasmus Bo Sørensen, Christoph Thomas Muller, Kees Goossens, Jens Sparsø

IEEE Trans. Very Large Scale Integr. Syst., 2016

2014

Synthesis and layout of an asynchronous network-on-chip using Standard EDA tools.

Christoph Thomas Muller, Evangelia Kasapaki, Rasmus Bo Sørensen, Jens Sparsø

Proceedings of the 2014 NORCHIP, Tampere, Finland, October 27-28, 2014, 2014

2013

A 65-nm CMOS area optimized de-synchronization flow for sub-VT designs.

Christoph Thomas Muller, Steffen Malkowsky, Oskar Andersson, Babak Mohammadi, Jens Sparsø, Joachim Neves Rodrigues

Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013