Christoph Spang

Orcid: 0000-0003-1606-4474

Affiliations:
  • TU Darmstadt, Germany


According to our database1, Christoph Spang authored at least 9 papers between 2020 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
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PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2024
TaPaFuzz: Hardware-accelerated RISC-V bare-metal firmware fuzzing using rapid job launches.
J. Syst. Archit., 2024

2023
Advantages of a Statistical Estimation Approach for Clock Frequency Estimation of Heterogeneous and Irregular CGRAs.
ACM Trans. Reconfigurable Technol. Syst., March, 2023

PQC-HA: A Framework for Prototyping and In-Hardware Evaluation of Post-Quantum Cryptography Hardware Accelerators.
CoRR, 2023

TaPaFuzz - An FPGA-Accelerated Framework for RISC-V IoT Graybox Fuzzing.
Proceedings of the Design and Architecture for Signal and Image Processing, 2023

2022
DExIE - An IoT-Class Hardware Monitor for Real-Time Fine-Grained Control-Flow Integrity.
J. Signal Process. Syst., 2022

SCAIE-V: an open-source SCAlable interface for ISA extensions for RISC-V processors.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

IPEC: Open-Source Design Automation for Inter-Processing Element Communication.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2022

2021
RT-LIFE: Portable RISC-V Interface for Real-Time Lightweight Security Enforcement.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2021

2020
Towards Purposeful Design Space Exploration of Heterogeneous CGRAs: Clock Frequency Estimation.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020


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