Christian Vogel
Orcid: 0000-0002-8617-5375Affiliations:
- FTW, Austria
- Graz University of Technology, Austria (former)
- ETH Zurich, Switzerland (former)
- Linköping University, Sweden (former)
According to our database1,
Christian Vogel
authored at least 46 papers
between 2004 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2021
A Background Correlation-Based Timing Skew Estimation Method for Time-Interleaved ADCs.
IEEE Access, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
Kompetenzfelder der Elektronik - Systemlösungen des Instituts Electronic Engineering der FH JOANNEUM.
Elektrotech. Informationstechnik, 2020
2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
A survey of delay and gain correction methods for the indirect learning of digital predistorters.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016
Baseband volterra filters with even-order terms: Theoretical foundation and practical implications.
Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016
2015
Digital predistorter identification based on constrained multi-objective optimization of WLAN standard performance metrics.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Analysis of even-order terms in memoryless and quasi-memoryless polynomial baseband models.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
Linearization of Time-Varying Nonlinear Systems Using A Modified Linear Iterative Method.
IEEE Trans. Signal Process., 2014
Analytical description of multilevel carrier-based PWM of arbitrary bounded input signals.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Proceedings of the IEEE International Conference on Acoustics, 2014
2013
IEEE Trans. Circuits Syst. II Express Briefs, 2013
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
IEEE Trans. Aerosp. Electron. Syst., 2013
LMMSE Estimation and Interpolation of Continuous-Time Signals from Discrete-Time Samples Using Factor Graphs
CoRR, 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
2012
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
IEEE Trans. Aerosp. Electron. Syst., 2012
A review on low-complexity structures and algorithms for the correction of mismatch errors in time-interleaved ADCs.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012
2011
Adaptive Blind Background Calibration of Polynomial-Represented Frequency Response Mismatches in a Two-Channel Time-Interleaved ADC.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
Elektrotech. Informationstechnik, 2011
Low complexity least-squares filter design for the correction of linear time-varying systems.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
2010
On the detection probability of parallel code phase search algorithms in GPS receivers.
Proceedings of the IEEE 21st International Symposium on Personal, 2010
Simulation, MMSE estimation, and interpolation of sampled continuous-time signals using factor graphs.
Proceedings of the Information Theory and Applications Workshop, 2010
Adaptive compensation of frequency response mismatches in high-resolution time-interleaved ADCs using a low-resolution ADC and a time-varying filter.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the 17th IEEE International Conference on Electronics, 2010
2009
A Flexible and Scalable Structure to Compensate Frequency Response Mismatches in Time-Interleaved ADCs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
A Phase-Domain All-Digital Phase-Locked Loop Architecture Without Reference Clock Retiming.
IEEE Trans. Circuits Syst. II Express Briefs, 2009
Elektrotech. Informationstechnik, 2009
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009
2008
Reconstruction of Nonuniformly Sampled Bandlimited Signals Using a Differentiator-Multiplier Cascade.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Adaptive blind compensation of gain and timing mismatches in M-channel time-interleaved ADCs.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008
Improved lock-time in all-digital phase-locked loops due to binary search acquisition.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008
2007
Reconstruction of Two-Periodic Nonuniformly Sampled Band-Limited Signals Using a Discrete-Time Differentiator and a Time-Varying Multiplier.
IEEE Trans. Circuits Syst. II Express Briefs, 2007
On the Compensation of Magnitude Response Mismatches in M-channel Time-interleaved ADCs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
A Compensation Method for Magnitude Response Mismatches in Two-channel Time-interleaved Analog-to-Digital Converters.
Proceedings of the 13th IEEE International Conference on Electronics, 2006
2005
IEEE Trans. Instrum. Meas., 2005
Spectral shaping of timing mismatches in time-interleaved analog-to-digital converters.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004