Christian Siemers

Affiliations:
  • Clausthal University of Technology, Department of Informatics, Clausthal-Zellerfeld, Germany
  • University of Applied Sciences Nordhausen, Department of Engineering Sciences, Germany
  • West Coast University of Applied Sciences, Heide, Germany


According to our database1, Christian Siemers authored at least 26 papers between 1989 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
Requirements for Playbook-Assisted Cyber Incident Response, Reporting and Automation.
DTRAP, 2024

2022
Mechanical Design and Analysis of a Novel Three-Legged, Compact, Lightweight, Omnidirectional, Serial-Parallel Robot with Compliant Agile Legs.
Robotics, 2022

Overhead-Aware Schedule Synthesis for Logical Execution Time (LET) in Automotive Systems.
Proceedings of the 35th IEEE International System-on-Chip Conference, 2022

2021
Topological Analysis of a Novel Compact Omnidirectional Three-Legged Robot with Parallel Hip Structures Regarding Locomotion Capability and Load Distribution.
Robotics, 2021

Private Cloud Tuning for Efficient Inter-Server Simulation Execution.
Proceedings of the 11th IEEE Annual Computing and Communication Workshop and Conference, 2021

2019
A Processor Architecture for Executing Global Cellular Automata as Software.
Proceedings of the Parallel Computing: Technology Trends, 2019

2016
C to Cellular Automata and Execution on CPU, GPU and FPGA.
J. Cell. Autom., 2016

2014
Objektorientierte Graphendarstellung von Simulink-Modellen zur einfachen Analyse und Transformation.
CoRR, 2014

Appropriate Multi-core Architecture for Safety-critical Aerospace Applications - Certifiable Real-time Switching Network.
Proceedings of the PECCS 2014, 2014

An efficient spin-lock based multi-core resource sharing protocol.
Proceedings of the IEEE 33rd International Performance Computing and Communications Conference, 2014

Self-aware and self-expressive driven fault tolerance for embedded systems.
Proceedings of the IEEE Symposium on Intelligent Embedded Systems, 2014

2010
WatchCop - Safer Software Execution through Hardware/Software Co-Design.
Proceedings of the Sicherheit 2010: Sicherheit, 2010

2005
Reliable event-triggered systems for mechatronic applications.
J. Syst. Softw., 2005

2004
Robust Partitioning for Reliable Real-Time Systems.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

Definition of a Configurable Architecture for Implementation of Global Cellular Automaton.
Proceedings of the Organic and Pervasive Computing, 2004

2003
The Universal Configurable Block/Machine-- An Approach for a Configurable SoC-Architecture.
J. Supercomput., 2003

Modelling Programmable Logic Devices and Reconfigurable, Microprocessor-Related Architectures.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

Supporting the Hard Real-Time Requirements of Mechatronic Systems by 2-Level Interrupt Service Management.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

2002
Reconfigurable RISC - A New Approach for Space-Efficient Superscalar Microprocessor Architecture.
Proceedings of the Trends in Network and Pervasive Computing, 2002

2000
Reconfigurable Computing between Classifications and Metrics - The Approach of Space/Time-Scheduling.
Proceedings of the Field-Programmable Logic and Applications, 2000

Reconfigurable Computing Based on Universal Configurable Blocks-A New Approach for Supporting Performance- and Realtime-Dominated Applications.
Proceedings of the 5th Australasian Computer Architecture Conference (ACAC 2000), 31 January, 2000

1999
Universal Configurable Machine (UCM): Reconfigurable Computing, basierend auf grobkörnigen Blockstrukturen.
Proceedings of the Workshops zur Architektur von Rechensystemen, 1999

1998
Parallele Programmierung - Nicht ohne Prozessor- und Rechnertechnik.
HMD Prax. Wirtsch., 1998

The >S<puter: Introducing a Novel Concept for Dispatching Instructions Using Reconfigurable Hardware.
Proceedings of the Field-Programmable Logic and Applications, 1998

1997
Der>S<puter: Ein dynamisch rekonfigurierbares Mikroarchitekturmodell zur Erreichung des maximalen Instruktionsparallelitätsgrades.
Proceedings of the Architektur von Rechensystemen, Arbeitsteilige Systemarchitekturen: Konzepte, Lösungen, Anwendungen, Trends, 1997

1989
Modelling and measurement of memory access in SIEMENS VP supercomputers.
Parallel Comput., 1989


  Loading...