Christian Sauer

Affiliations:
  • Cadence Design Systems, Munich, Germany
  • Infineon Technologies, Communications Solutions, Munich, Germany (former)
  • California University, Berkeley, CA, USA (former)


According to our database1, Christian Sauer authored at least 41 papers between 2001 and 2023.

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Bibliography

2023
Using STLs for Effective In-Field Test of GPUs.
IEEE Des. Test, April, 2023

Evaluating the Hardware Performance Counters of an Xtensa Virtual Prototype.
Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023


2022
Methodology for an Early Exploration of Embedded Systems using Portable Test and Stimulus Standard.
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022

2021
An automated formal-based approach for reducing undetected faults in ISO 26262 hardware compliant designs.
Proceedings of the IEEE International Test Conference, 2021

Flip Flop Weighting: A technique for estimation of safety metrics in Automotive Designs.
Proceedings of the 27th IEEE International Symposium on On-Line Testing and Robust System Design, 2021

2020
Special Session: AutoSoC - A Suite of Open-Source Automotive SoC Benchmarks.
Proceedings of the 38th IEEE VLSI Test Symposium, 2020

Representing Gate-Level SET Faults by Multiple SEU Faults at RTL.
Proceedings of the 26th IEEE International Symposium on On-Line Testing and Robust System Design, 2020

Determined-Safe Faults Identification: A step towards ISO26262 hardware compliant designs.
Proceedings of the IEEE European Test Symposium, 2020

RESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
Accelerating Transient Fault Injection Campaigns by using Dynamic HDL Slicing.
Proceedings of the 2019 IEEE Nordic Circuits and Systems Conference, 2019

Efficient Methodology for ISO26262 Functional Safety Verification.
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

Efficient Fault Injection based on Dynamic HDL Slicing Technique.
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

Untestable faults identification in GPGPUs for safety-critical applications.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

Combining Fault Analysis Technologies for ISO26262 Functional Safety Verification.
Proceedings of the 28th IEEE Asian Test Symposium, 2019

2016
A Lightweight Framework for the Dynamic Creation and Configuration of Virtual Platforms in SystemC.
ACM Trans. Embed. Comput. Syst., 2016

2015
A lightweight infrastructure for the dynamic creation and configuration of virtual platforms.
Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015

2014
Distributed, loosely-synchronized systemC/TLM simulations of many-processor platforms.
Proceedings of the 2014 Forum on Specification and Design Languages, 2014

2010
Prioritized medium access in ad-hoc networks with a SystemClick model of the IEEE 802.11n MAC.
Proceedings of the IEEE 21st International Symposium on Personal, 2010

2009
UMAC - A Universal MAC architecture for heterogeneous home networks.
Proceedings of the International Conference on Ultra Modern Telecommunications, 2009

A Modular Reference Application for IEEE 802.11n Wireless LAN MACs.
Proceedings of IEEE International Conference on Communications, 2009

Exploration of embedded memories in SoCs using SystemC-based functional performance models.
Proceedings of the Forum on specification and Design Languages, 2009

Implementing a Software-Based 802.11 MAC on a Customized Platform.
Proceedings of the 6th IEEE Consumer Communications and Networking Conference, 2009

2008
SystemClick: a domain-specific framework for early exploration using functional performance models.
Proceedings of the 45th Design Automation Conference, 2008

2007
SystemQ: Bridging the gap between queuing-based performance evaluation and SystemC.
Des. Autom. Embed. Syst., 2007

Interactive presentation: Hard- and software modularity of the NOVA MPSoC platform.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Application-Driven Development of Concurrent Packet Processing Platforms.
Proceedings of the Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 2006

Performance Evaluation of Packet Processing Architectures Using Multiclass Queuing Networks.
Proceedings of the Proceedings 39th Annual Simulation Symposium (ANSS-39 2006), 2006

2005
SystemQ: A Queuing-Based Approach to Architecture Performance Evaluation with SystemC.
Proceedings of the Embedded Computer Systems: Architectures, 2005

Trends in Access Networks and their Implementation in DSLAMs.
Proceedings of the 30th Annual IEEE Conference on Local Computer Networks (LCN 2005), 2005

Modular Reference Implementation of an IP-DSLAM.
Proceedings of the 10th IEEE Symposium on Computers and Communications (ISCC 2005), 2005

Performance Evaluation of VLSI platforms using SystemQ.
Proceedings of the 35. Jahrestagung der Gesellschaft für Informatik, 2005

Application-Driven Design of Cost-Efficient Communications Platforms.
Proceedings of the 35. Jahrestagung der Gesellschaft für Informatik, 2005

Modular domain-specific implementation and exploration framework for embedded software platforms.
Proceedings of the 42nd Design Automation Conference, 2005

2004
Developing a Flexible Interface for RapidIO, Hypertransport, and PCI-Express.
Proceedings of the 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 2004

Fast cycle-accurate simulation and instruction set generation for constraint-based descriptions of programmable architectures.
Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2004

2003
A 100-GOPS Programmable Processor for Vehicle Vision Systems.
IEEE Des. Test Comput., 2003

Comparing Analytical Modeling with Simulation for Network Processors: A Case Study.
Proceedings of the 2003 Design, 2003

Programming challenges in network processor deployment.
Proceedings of the International Conference on Compilers, 2003

2002
Developing Architectural Platforms: A Disciplined Approach.
IEEE Des. Test Comput., 2002

2001
Self-routing crossbar switch with internal contention resolution.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001


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