Christian Panis

According to our database1, Christian Panis authored at least 13 papers between 2003 and 2011.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2011
DODT: Increasing requirements formalism using domain ontologies for improved embedded systems development.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

2010
Parameterized MAC unit generation for a scalable embedded DSP core.
Microprocess. Microsystems, 2010

2009
Physical realization oriented area-power-delay tradeoff exploration.
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

2004
xDSPcore: A Compiler-Based Configurable Digital Signal Processor.
IEEE Micro, 2004

A scalable instruction buffer and align unit for xDSPcore.
IEEE J. Solid State Circuits, 2004

DSPxPlore: design space exploration methodology for an embedded DSP core.
Proceedings of the 2004 ACM Symposium on Applied Computing (SAC), 2004

FSEL - Selective Predicated Execution for a Configurable DSP Core.
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

A scalable embedded DSP core for SoC applications.
Proceedings of the 2004 International Symposium on System-on-Chip, 2004

2003
A Branch File for a Configurable DSP Core.
Proceedings of the International Conference on VLSI, 2003

Scaleable Shadow Stack for a Configurable DSP Concept.
Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003

xICU - in interrupt control unit for a configurable DSP core.
Proceedings of the 2003 International Symposium on System-on-Chip, 2003

xLIW - a scaleable long instruction word.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A scaleable instruction buffer for a configurable DSP core.
Proceedings of the ESSCIRC 2003, 2003


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