Christian Fibich

According to our database, Christian Fibich authored at least 13 papers between 2015 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Open-Source Ethernet MAC IP Cores for FPGAs: Overview and Evaluation.

Christian Fibich, Patrick Schmitt, Roland Höller, Peter Rössler

Int. J. Reconfigurable Comput., 2023

Characterization of Interconnect Fault Effects in SRAM-based FPGAs.

Christian Fibich, Martin Horauer, Roman Obermaisser

Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023

Bitstream- Level Interconnect Fault Characterization for SRAM-based FPGAs.

Christian Fibich, Martin Horauer, Roman Obermaisser

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2021

Device- and Temperature Dependency of Systematic Fault Injection Results in Artix-7 and iCE40 FPGAs.

Christian Fibich, Martin Horauer, Roman Obermaisser

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

Evaluation of Open-Source Linear Algebra Libraries targeting ARM and RISC-V Architectures.

Christian Fibich, Stefan Tauner, Peter Rössler, Martin Horauer

Proceedings of the 2020 Federated Conference on Computer Science and Information Systems, 2020

2019

FIJI: Fault InJection Instrumenter.

Christian Fibich, Stefan Tauner, Peter Rössler, Martin Horauer, Martin Matschnig, Herbert Taucher

EURASIP J. Embed. Syst., 2019

Evaluation of Open-Source Linear Algebra Libraries in Embedded Applications.

Christian Fibich, Stefan Tauner, Peter Rössler, Martin Horauer, Markus Krapfenbauer, Martin Linauer, Martin Matschnig, Herbert Taucher

Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019

Reliability-Enhanced High-Level Synthesis using Memory Profiling and Fault Injection.

Christian Fibich, Martin Horauer, Roman Obermaisser

Proceedings of the 28th IEEE International Symposium on Industrial Electronics, 2019

2018

Preliminary Evaluation of High-level Synthesis Tools - Xilinx Vivado and PandA Bambu.

Christian Fibich, Stefan Tauner, Peter Rössler, Martin Horauer, Herbert Taucher, Martin Matschnig

Proceedings of the 13th IEEE International Symposium on Industrial Embedded Systems, 2018

2017

HLshield: a reliability enhancement framework for high-level synthesis.

Christian Fibich, Martin Horauer, Roman Obermaisser

Proceedings of the 12th IEEE International Symposium on Industrial Embedded Systems, 2017

Vulnerability analysis of storage elements in HLS-generated designs using high-level profiling.

Christian Fibich, Martin Horauer, Roman Obermaisser

Proceedings of the 2nd International Conference on System Reliability and Safety, 2017

2015

A netlist-level fault-injection tool for FPGAs.

Christian Fibich, Peter Rössler, Stefan Tauner, Herbert Taucher, Martin Matschnig

Elektrotech. Informationstechnik, 2015

Logic synthesis of assertions for saftey-critical applications.

Matthias Wenzl, Christian Fibich, Peter Rössler, Herbert Taucher, Martin Matschnig

Proceedings of the IEEE International Conference on Industrial Technology, 2015