Christian Brugger
According to our database1,
Christian Brugger
authored at least 15 papers
between 2012 and 2018.
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Bibliography
2018
IEEE Des. Test, 2018
2016
A new approach to efficient heterogeneous computing = Ein neuer Ansatz für effiziente, heterogene Datenverarbeitung.
PhD thesis, 2016
Increasing sampling efficiency for the fixed degree sequence model with phase transitions.
Soc. Netw. Anal. Min., 2016
Precision-tuning and hybrid pricer for closed-form solution-based Heston calibration.
Concurr. Comput. Pract. Exp., 2016
2015
Exploiting the brownian bridge technique to improve longstaff-schwartz american option pricing on FPGA systems.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015
Proceedings of the 2015 International Symposium on Memory Systems, 2015
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Exploiting Phase Transitions for the Efficient Sampling of the Fixed Degree Sequence Model.
Proceedings of the 2015 IEEE/ACM International Conference on Advances in Social Networks Analysis and Mining, 2015
2014
ACM Trans. Reconfigurable Technol. Syst., 2014
A systematic methodology for analyzing closed-form Heston pricer regarding their accuracy and runtime.
Proceedings of the 7th Workshop on High Performance Computational Finance, 2014
HyPER: A runtime reconfigurable architecture for monte carlo option pricing in the Heston model.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014
Proceedings of the IEEE Conference on Computational Intelligence for Financial Engineering & Economics, 2014
2012
RIVER architecture: Reconfigurable flow and fabric for parallel stream processing on FPGAs.
Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012
RIVER: Reconfigurable Pre-Synthesized-Streaming Architecture for Signal Processing on FPGAs.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012