Chouki Aktouf
According to our database1,
Chouki Aktouf
authored at least 33 papers
between 1993 and 2017.
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2017
A Methodology for Automated Consistency Checking Between Different Power-Aware Descriptions.
Proceedings of the Languages, Design Methods, and Tools for Electronic System Design, 2017
Proceedings of the 2017 Forum on Specification and Design Languages, 2017
2015
Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015
2012
A Graph-Based Approach to Optimal Scan Chain Stitching Using RTL Design Descriptions.
VLSI Design, 2012
2011
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011
Proceedings of the 20th IEEE Asian Test Symposium, 2011
2008
2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2005
J. Netw. Syst. Manag., 2005
2004
Proceedings of the 2004 Design, 2004
2003
An Optical Boundary Scan Cell for On Line Testing of Embedded Systems.
Proceedings of the International Conference on Embedded Systems and Applications, 2003
2002
IEEE Des. Test Comput., 2002
Using Concurrent and Semi-Concurrent On-Line Testing During HLS: An Adaptable Approach.
Proceedings of the 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 2002
On-line Testing of Embedded Systems Using Optical Probes: System Modeling and Probing Technology.
Proceedings of the 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 2002
2001
On-Line Testing in Continuous Operation of Embedded Systems: Modeling and Performance Evaluation.
Proceedings of the 7th IEEE International On-Line Testing Workshop (IOLTW 2001), 2001
2000
Hierarchical interfaces for hardware software systems.
Proceedings of the 14<sup>th</sup> European Simulation Multiconference, 2000
1999
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999
1998
Parallel Comput., 1998
An Implementation Approach of the IEEE 1149.1 for the Routing Test of a VLSI Massively Parallel Architecture.
J. Electron. Test., 1998
On-line testing of scalable signal processing architectures using a software test method.
Proceedings of the Proceedings IEEE International Test Conference 1998, 1998
1997
Proceedings of the 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems (DFT '97), 1997
1996
Proceedings of the 4th Euromicro Workshop on Parallel and Distributed Processing (PDP '96), 1996
1995
Host-Diagnosis of Parallel Systems.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1995
A Diagnosis Strategy for Cluster-Based Parallel Architectures.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1995
Proceedings of the Proceedings IEEE International Test Conference 1995, 1995
Proceedings of the 4th Asian Test Symposium (ATS '95), 1995
1994
Proceedings of the International Symposium on Parallel Architectures, 1994
Proceedings of the 1994 International Conference on Parallel Processing, 1994
Design and Test of a Massively Parallel Architecture.
Proceedings of the Massively Parallel Processing Applications and Develompent, 1994
1993
RAP: a Fine Grain MIMD Machine.
Proceedings of the Parallel Computing: Trends and Applications, 1993
Functional Testing and Reconfiguration of MIMD Machines.
Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1993