Chongyan Gu

Orcid: 0000-0002-3028-8004

According to our database¹, Chongyan Gu authored at least 56 papers between 2014 and 2025.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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PhD thesis

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Bibliography

2025

A 0.09-pJ/Bit Logic-Compatible Multiple-Time Programmable (MTP) Memory-Based PUF Design for IoT Applications.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., January, 2025

2024

An Efficient Ring Oscillator PUF Using Programmable Delay Units on FPGA.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., January, 2024

PUF-Assisted Radio Frequency Fingerprinting Exploiting Power Amplifier Active Load-Pulling.

[BibT_eX]

[DOI]

IEEE Trans. Inf. Forensics Secur., 2024

GATrojan: An Efficient Gate-level Hardware Trojan Detection Approach Using Graph Attention Networks.

[BibT_eX]

[DOI]

Proceedings of the 37th IEEE International System-on-Chip Conference, 2024

A Novel Methodology for Processor based PUF in Approximate Computing.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Negative Capacitance FET 8T SRAM Computing in-Memory based Logic Design for Energy Efficient AI Edge Devices.

[BibT_eX]

[DOI]

Venu Birudu

Tirumalarao Kadiyam

Koteswararao Penumalli

Aditya Japa

Sushma Nirmala Sambatur

Chongyan Gu

Siva Sankar Yellampalli

Ramesh Vaddi

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023

Security and Approximation: Vulnerabilities in Approximation-Aware Testing.

[BibT_eX]

[DOI]

IEEE Trans. Emerg. Top. Comput., 2023

PUF-Based Mutual Authentication and Key Exchange Protocol for Peer-to-Peer IoT Applications.

[BibT_eX]

[DOI]

IEEE Trans. Dependable Secur. Comput., 2023

An RRAM-based PUF with Adjustable Programmable Voltage and Multi-Mode Operation.

[BibT_eX]

[DOI]

Proceedings of the 18th ACM International Symposium on Nanoscale Architectures, 2023

A Novel Method Against Hardware Trojans in Approximate Circuits.

[BibT_eX]

[DOI]

Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

Novel Intrinsic Physical Unclonable Function Design for Post-quantum Cryptography.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

DDQ-APUF: A Highly Reliable Arbiter PUF Using Delay Difference Quantization.

[BibT_eX]

[DOI]

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2023

Processor based Intrinsic PUF Design for Approximate Computing: Faith or Reality?

[BibT_eX]

[DOI]

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2023

2022

A Generic Dynamic Responding Mechanism and Secure Authentication Protocol for Strong PUFs.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2022

Deep Learning-Based Hardware Trojan Detection With Block-Based Netlist Information Extraction.

[BibT_eX]

[DOI]

IEEE Trans. Emerg. Top. Comput., 2022

A Dynamically Configurable PUF and Dynamic Matching Authentication Protocol.

[BibT_eX]

[DOI]

IEEE Trans. Emerg. Top. Comput., 2022

A Lightweight and Machine-Learning-Resistant PUF Using Obfuscation-Feedback-Shift-Register.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2022

Secured Data Transmission Over Insecure Networks-on-Chip by Modulating Inter-Packet Delays.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Radio Frequency Fingerprints vs. Physical Unclonable Functions - Are They Twins, Competitors, or Allies?

[BibT_eX]

[DOI]

IEEE Netw., 2022

TVD-PB logic circuit based on camouflaging circuit for IoT security.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2022

A Novel Combined Correlation Power Analysis (CPA) Attack on Schoolbook Polynomial Multiplication in Lattice-based Cryptosystems.

[BibT_eX]

[DOI]

Proceedings of the 35th IEEE International System-on-Chip Conference, 2022

Security Vulnerabilities and Countermeasures for Approximate Circuits.

[BibT_eX]

[DOI]

Proceedings of the Approximate Computing, 2022

2021

A Flip-Flop Based Arbiter Physical Unclonable Function (APUF) Design with High Entropy and Uniqueness for FPGA Implementation.

[BibT_eX]

[DOI]

IEEE Trans. Emerg. Top. Comput., 2021

A Modeling Attack Resistant Deception Technique for Securing Lightweight-PUF-Based Authentication.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

A lightweight key renewal scheme based authentication protocol with configurable RO PUF for clustered sensor networks.

[BibT_eX]

[DOI]

Microelectron. J., 2021

DTA-PUF: Dynamic Timing-aware Physical Unclonable Function for Resource-constrained Devices.

[BibT_eX]

[DOI]

Georgios Karakonstantis

ACM J. Emerg. Technol. Comput. Syst., 2021

SCA secure and updatable crypto engines for FPGA SoC bitstream decryption: extended version.

[BibT_eX]

[DOI]

J. Cryptogr. Eng., 2021

A large-scale comprehensive evaluation of single-slice ring oscillator and PicoPUF bit cells on 28-nm Xilinx FPGAs.

[BibT_eX]

[DOI]

J. Cryptogr. Eng., 2021

Dynamically Configurable Physical Unclonable Function based on RRAM Crossbar.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2021

A Dynamic Highly Reliable SRAM-Based PUF Retaining Memory Function.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

Security in Approximate Computing and Approximate Computing for Security: Challenges and Opportunities.

[BibT_eX]

[DOI]

Proc. IEEE, 2020

Ten years of hardware Trojans: a survey from the attacker's perspective.

[BibT_eX]

[DOI]

IET Comput. Digit. Tech., 2020

Transformer PUF : A Highly Flexible Configurable RO PUF Based on FPGA.

[BibT_eX]

[DOI]

Proceedings of the IEEE Workshop on Signal Processing Systems, 2020

A Novel Feature Extraction Strategy for Hardware Trojan Detection.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Programmable Ring Oscillator PUF Based on Switch Matrix.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Security Analysis of Hardware Trojans on Approximate Circuits.

[BibT_eX]

[DOI]

Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

2019

XOR-Based Low-Cost Reconfigurable PUFs for IoT Security.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2019

A Theoretical Model to Link Uniqueness and Min-Entropy for PUF Evaluations.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2019

Theoretical Analysis of Configurable RO PUFs and Strategies to Enhance Security.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems, 2019

Multi-Incentive Delay-Based (MID) PUF.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Theoretical Analysis of Delay-Based PUFs and Design Strategies for Improvement.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

SCA Secure and Updatable Crypto Engines for FPGA SoC Bitstream Decryption.

[BibT_eX]

[DOI]

Proceedings of the 3rd ACM Workshop on Attacks and Solutions in Hardware Security Workshop, 2019

A Large Scale Comprehensive Evaluation of Single-Slice Ring Oscillator and PicoPUF Bit Cells on 28nm Xilinx FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 3rd ACM Workshop on Attacks and Solutions in Hardware Security Workshop, 2019

A Modeling Attack Resistant Deception Technique for Securing PUF based Authentication.

[BibT_eX]

[DOI]

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2019

2018

Ultra-Lightweight and Reconfigurable Tristate Inverter Based Physical Unclonable Function Design.

[BibT_eX]

[DOI]

IEEE Access, 2018

A Highly Flexible Lightweight and High Speed True Random Number Generator on FPGA.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Modelling Attack Analysis of Configurable Ring Oscillator (CRO) PUF Designs.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE International Conference on Digital Signal Processing, 2018

Large scale RO PUF analysis over slice type, evaluation time and temperature on 28nm Xilinx FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

A machine learning attack resistant multi-PUF design on FPGA.

[BibT_eX]

[DOI]

Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

Attacking Arbiter PUFs Using Various Modeling Attack Algorithms: A Comparative Study.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

Approximate Computing and Its Application to Hardware Security.

[BibT_eX]

[DOI]

Proceedings of the Cyber-Physical Systems Security., 2018

2017

Improved Reliability of FPGA-Based PUF Identification Generator Design.

[BibT_eX]

[DOI]

Chongyan Gu

Neil Hanley

Máire O'Neill

ACM Trans. Reconfigurable Technol. Syst., 2017

FPGA-based strong PUF with increased uniqueness and entropy properties.

[BibT_eX]

[DOI]

Chongyan Gu

Neil Hanley

Máire O'Neill

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016

Novel lightweight FF-APUF design for FPGA.

[BibT_eX]

[DOI]

Proceedings of the 29th IEEE International System-on-Chip Conference, 2016

2015

Ultra-compact and robust FPGA-based PUF identification generator.

[BibT_eX]

[DOI]

Chongyan Gu

Máire O'Neill

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014

A unique and robust single slice FPGA identification generator.

[BibT_eX]

[DOI]

Chongyan Gu

Julian P. Murphy

Máire O'Neill

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Chongyan Gu

Timeline

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