Chiu-Wing Sham
Orcid: 0000-0001-7007-6746
According to our database1,
Chiu-Wing Sham
authored at least 91 papers
between 2001 and 2024.
Collaborative distances:
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Bibliography
2024
JPEG-compatible Joint Image Compression and Encryption Algorithm with File Size Preservation.
ACM Trans. Multim. Comput. Commun. Appl., April, 2024
Batch medical image encryption using 3D Latin cube-based simultaneous permutation and diffusion.
Signal Image Video Process., April, 2024
Neural Comput. Appl., April, 2024
An efficient chaotic image encryption scheme using simultaneous permutation-diffusion operation.
Vis. Comput., March, 2024
Expert Syst. J. Knowl. Eng., March, 2024
A fast selective encryption scheme for H.264/AVC video with syntax-preserving and zero bit rate expansion.
Signal Image Video Process., February, 2024
Pattern Recognit., 2024
DMSA-UNet: Dual Multi-Scale Attention makes UNet more strong for medical image segmentation.
Knowl. Based Syst., 2024
Joint Source-Channel Coding System for 6G Communication: Design, Prototype and Future Directions.
IEEE Access, 2024
Proceedings of the 13th IEEE Global Conference on Consumer Electronics, 2024
Proceedings of the 13th IEEE Global Conference on Consumer Electronics, 2024
Proceedings of the 13th IEEE Global Conference on Consumer Electronics, 2024
Proceedings of the 13th IEEE Global Conference on Consumer Electronics, 2024
Proceedings of the 13th IEEE Global Conference on Consumer Electronics, 2024
PQDE: Comprehensive Progressive Quantization with Discretization Error for Ultra-Low Bitrate MobileNet towards Low-Resolution Imagery.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024
2023
J. Inf. Secur. Appl., November, 2023
Automatic skin lesion classification using a novel densely connected convolutional network integrated with an attention module.
J. Ambient Intell. Humaniz. Comput., July, 2023
Comput. Biol. Medicine, May, 2023
Proceedings of the 12th IEEE Global Conference on Consumer Electronics, 2023
2022
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
A fast parallel batch image encryption algorithm using intrinsic properties of chaos.
Signal Process. Image Commun., 2022
Protection of image ROI using chaos-based encryption and DCNN-based object detection.
Neural Comput. Appl., 2022
A more compact object detector head network with feature enhancement and relational reasoning.
Neurocomputing, 2022
Expert Syst. Appl., 2022
Comput. Biol. Medicine, 2022
Comput. Biol. Medicine, 2022
Uncertainty teacher with dense focal loss for semi-supervised medical image segmentation.
Comput. Biol. Medicine, 2022
Proceedings of the 11th IEEE Global Conference on Consumer Electronics, 2022
2021
IEEE Commun. Lett., 2021
An Embedded Iris Recognition System Optimization using Dynamically ReconfigurableDecoder with LDPC Codes.
CoRR, 2021
An Effective Multi-Mode Iris Authentication System on a Microprocessor-FPGA Heterogeneous Platform With QC-LDPC Codes.
IEEE Access, 2021
Proceedings of the 10th IEEE Global Conference on Consumer Electronics, 2021
Proceedings of the 10th IEEE Global Conference on Consumer Electronics, 2021
Proceedings of the 10th IEEE Global Conference on Consumer Electronics, 2021
2020
A Real-Time Flexible Telecommunication Decoding Architecture Using FPGA Partial Reconfiguration.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
IEEE Trans. Circuits Syst. II Express Briefs, 2020
Hardware Design of Concatenated Zigzag Hadamard Encoder/Decoder System With High Throughput.
IEEE Access, 2020
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
Proceedings of the 2nd IEEE Global Conference on Life Sciences and Technologies, 2020
Proceedings of the GECCO '20: Genetic and Evolutionary Computation Conference, 2020
An Iris Recognition System Implementation with Error Correction Capability by Reusing WiFi Standard LDPC Codes.
Proceedings of the 9th IEEE Global Conference on Consumer Electronics, 2020
A Novel Iris Verification Framework Using Machine Learning algorithm on Embedded Systems.
Proceedings of the 9th IEEE Global Conference on Consumer Electronics, 2020
Proceedings of the 2020 IEEE Asia Pacific Conference on Circuits and Systems, 2020
2019
IEEE Wirel. Commun. Lett., 2019
Proceedings of the 6th International Conference on Systems and Informatics, 2019
Proceedings of the International Conference on Field-Programmable Technology, 2019
Proceedings of the International Conference on Field-Programmable Technology, 2019
Proceedings of the IEEE 8th Global Conference on Consumer Electronics, 2019
A Novel Data Packing Technique for QC-LDPC Decoder Architecture applied to NAND flash controller.
Proceedings of the IEEE 8th Global Conference on Consumer Electronics, 2019
Using Neuroevolved Binary Neural Networks to solve reinforcement learning environments.
Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019
2018
ACM Trans. Design Autom. Electr. Syst., 2018
IEEE Trans. Circuits Syst. II Express Briefs, 2018
An Optimization Approach for an RLL-Constrained LDPC Coded Recording System Using Deliberate Flipping.
IEEE Commun. Lett., 2018
Proceedings of the 10th IEEE International Symposium on Turbo Codes & Iterative Information Processing, 2018
2017
Unequal protection approach for RLL-constrained LDPC coded recording system using deliberate flipping.
Proceedings of the International SoC Design Conference, 2017
Proceedings of the 23rd Asia-Pacific Conference on Communications, 2017
Proceedings of the 23rd Asia-Pacific Conference on Communications, 2017
2016
A 3.0 Gb/s Throughput Hardware-Efficient Decoder for Cyclically-Coupled QC-LDPC Codes.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016
2015
Proceedings of the 2015 International Conference on Field Programmable Technology, 2015
2014
Microelectron. J., 2014
Obstacle-avoiding rectilinear Steiner tree construction in sequential and parallel approach.
Integr., 2014
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014
2013
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
LMgr: A low-M emory global router with dynamic topology update and bending-aware optimum path search.
Proceedings of the International Symposium on Quality Electronic Design, 2013
2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
2011
Proceedings of the Algorithms and Architectures for Parallel Processing, 2011
2010
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2010
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
2009
ACM Trans. Design Autom. Electr. Syst., 2009
Integr., 2009
2008
Optimizing wirelength and routability by searching alternative packings in floorplanning.
ACM Trans. Design Autom. Electr. Syst., 2008
2007
ACM Trans. Design Autom. Electr. Syst., 2007
2006
Proceedings of the 43rd Design Automation Conference, 2006
2005
Proceedings of the Seventh International Workshop on System-Level Interconnect Prediction (SLIP 2005), 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2003
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003
2002
Proceedings of the 2002 Design, 2002
2001
IEEE Trans. Very Large Scale Integr. Syst., 2001