Chitranjan K. Singh

According to our database, Chitranjan K. Singh authored at least 3 papers between 2007 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2010

A Generic Scalable Architecture for Min-Sum/Offset-Min-Sum Unit for Irregular/Regular LDPC Decoder.

Venkata K. Kidambi Srinivasan, Chitranjan K. Singh, Poras T. Balsara

IEEE Trans. Very Large Scale Integr. Syst., 2010

2007

VLSI Architecture for Matrix Inversion using Modified Gram-Schmidt based QR Decomposition.

Chitranjan K. Singh, Sushma Honnavara Prasad, Poras T. Balsara

Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Effect of Word-length Precision on the Performance of MIMO Systems.

Chitranjan K. Singh, Naofal Al-Dhahir, Poras T. Balsara

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007