Chitrakant Sahu

According to our database, Chitrakant Sahu authored at least 14 papers between 2014 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Design and analysis of high-performance double-gate ZnO nano-structured thin-film ISFET for pH sensing applications.

Dasari Srikanya, Aasif Mohammad Bhat, Chitrakant Sahu

Microelectron. J., 2023

2022

Steep-subthreshold slope dual gate negative capacitance junction less FET with dead channel: TCAD approach for digital/ RF applications.

Shalini Chaudhary, Basudha Dewan, Chitrakant Sahu, Menka Yadav

Microelectron. J., 2022

Food-Care: An Optoelectronic Device for Detection of Fertilizer Contamination in Fruits and Vegetables in Smart Agriculture Framework.

Gaurav Saxena, Chitrakant Sahu, Amit M. Joshi, Saraju P. Mohanty

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

2021

Detection and transmission of pH from food substances using IoT.

Gaurav Saxena, Chitrakant Sahu, Amit Mahesh Joshi

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021

Comparative Analog Analysis of Si, Ge and Si0.7Ge0.3 Channel Based DG-JLFET.

Ankita Porwal, Chitrakant Sahu, C. Periasamy

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021

Analysis of Current Drift in Al2O3 Gated Junctionless pH Sensitive Field Effect Transistor.

Jaydeep Singh Parmar, Asif Bhat, Nawaz Shafi, Ankita Porwal, C. Periasamy, Chitrakant Sahu

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021

Performance Assessment of Dual Metal Graded Channel Negative Capacitance Junctionless FET for Digital/Analog field.

Shalini Chaudhary, Basudha Dewan, Chitrakant Sahu, Menka Yadav

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021

2019

Analog/RF Performance Investigation of Dopingless FET for Ultra-Low Power Applications.

Ankit Sirohi, Chitrakant Sahu, Jawar Singh

IEEE Access, 2019

Ultra-Thin Si(1_x) Ge(x) Envelope Layer Induced Hole Quantum Well in Cylindrical Surrounding Gate p-FET with ITRS Considerations.

Nawaz Shafi, Ankita Porwal, Jaydeep Singh Parmaar, Aasif Mohammad Bhat, Chitrakant Sahu, C. Periasamy

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2019

2018

Biosensing Performance Optimization of DMFET for Fully Filled and Partially Filled Cavity.

Ankita Porwal, Chitrakant Sahu

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

VLSI Architecture of High Speed SAD for High Efficiency Video Coding (HEVC) Encoder.

Amit Mahesh Joshi, Mohammad Samar Ansari, Chitrakant Sahu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017

SiGe Source Charge Plasma TFET for Biosensing Applications.

Nawaz Shafi, Chitrakant Sahu, C. Periasamy, Jawar Singh

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2017

2016

Mixed-Mode Simulation of Common Emitter Amplifier Design Using Bipolar Charge Plasma Transistor.

Chitrakant Sahu, Nitesh Agrawal

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2016

2014

Linearly separable pattern classification using memristive crossbar circuits.

Komal Singh, Chitrakant Sahu, Jawar Singh

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014