Chio-In Ieong

According to our database, Chio-In Ieong authored at least 11 papers between 2012 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

SDP: Spiking Diffusion Policy for Robotic Manipulation with Learnable Channel-Wise Membrane Thresholds.

Zhixing Hou, Maoxu Gao, Hang Yu, Mengyu Yang, Chio-In Ieong

CoRR, 2024

FusionMamba: Dynamic Feature Enhancement for Multimodal Image Fusion with Mamba.

Xinyu Xie, Yawen Cui, Chio-In Ieong, Tao Tan, Xiaozhi Zhang, Xubin Zheng, Zitong Yu

CoRR, 2024

The Impact of Transient and Stable Patterns of Functional Connectivity in Emotion Recognition.

Yinghao Huang, Xucheng Liu, Ye Li, Chio-In Ieong, Yong Hu, Feng Wan

Proceedings of the IEEE International Conference on Computational Intelligence and Virtual Environments for Measurement Systems and Applications, 2024

2019

A 0.12-mm² 1.2-to-2.4-mW 1.3-to-2.65-GHz Fractional-N Bang-Bang Digital PLL With 8-µs Settling Time for Multi-ISM-Band ULP Radios.

Ka-Fai Un, Gengzhen Qi, Jun Yin, Shiheng Yang, Shupeng Yu, Chio-In Ieong, Pui-In Mak, Rui Paulo Martins

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2017

A 0.45 V 147-375 nW ECG Compression Processor With Wavelet Shrinkage and Adaptive Temporal Decimation Architectures.

Chio-In Ieong, Mingzhong Li, Man-Kay Law, Pui-In Mak, Mang I Vai, Rui Paulo Martins

IEEE Trans. Very Large Scale Integr. Syst., 2017

2016

Wide Input Range Supply Voltage Tolerant Capacitive Sensor Readout Using On-Chip Solar Cell.

Suyan Fan, Man-Kay Law, Mingzhong Li, Zhiyuan Chen, Chio-In Ieong, Pui-In Mak, Rui Paulo Martins

J. Circuits Syst. Comput., 2016

Sub-threshold VLSI logic family exploiting unbalanced pull-up/down network, logical effort and inverse-narrow-width techniques.

Mingzhong Li, Chio-In Ieong, Man-Kay Law, Pui-In Mak, Mang I Vai, Sio-Hang Pun, Rui Paulo Martins

Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

Sub-µW QRS detection processor using quadratic spline wavelet transform and maxima modulus pair recognition for power-efficient wireless arrhythmia monitoring.

Chio-In Ieong, Pui-In Mak, Mang I Vai, Rui Paulo Martins

Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015

Energy Optimized Subthreshold VLSI Logic Family With Unbalanced Pull-Up/Down Network and Inverse Narrow-Width Techniques.

Mingzhong Li, Chio-In Ieong, Man-Kay Law, Pui-In Mak, Mang I Vai, Sio-Hang Pun, Rui Paulo Martins

IEEE Trans. Very Large Scale Integr. Syst., 2015

2013

Sub-threshold standard cell library design for ultra-low power biomedical applications.

Mingzhong Li, Chio-In Ieong, Man-Kay Law, Pui-In Mak, Mang I Vai, Rui Paulo Martins

Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013

2012

A 0.83-µW QRS Detection Processor Using Quadratic Spline Wavelet Transform for Wireless ECG Acquisition in 0.35-µm CMOS.

Chio-In Ieong, Pui-In Mak, Chi-Pang Lam, Cheng Dong, Mang I Vai, Peng Un Mak, Sio-Hang Pun, Feng Wan, Rui Paulo Martins

IEEE Trans. Biomed. Circuits Syst., 2012