Ching-Hwa Cheng

Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022

2021

A Multiple Layer U-Net, Un-Net, for Liver and Liver Tumor Segmentation in CT.

[BibT_eX]

[DOI]

Song-Toan Tran

IEEE Access, 2021

An Intelligent Image-Based Force Sensing System Development to Assist Robot-Arm Surgery.

[BibT_eX]

[DOI]

Pham Minh Dung

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

The Performance-Complexity Efficient Time-to-Digit and Data-Processing Chips Design and Validation for a LiDAR System.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

An Overlapping and Leading Edge Detection Combined Technique for Distance Estimation under High-Background Lights in a Pulsed-LiDAR System.

[BibT_eX]

[DOI]

Proceedings of the IECC 2021: 3rd International Electronics Communication Conference, Ho Chi Minh City, Vietnam, July 8, 2021

2020

Low-Power 3D-PCB Stacking System Design and Validation by Automatic Voltage-Current Scalable Technique.

[BibT_eX]

[DOI]

Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020

Design and Implementation of a Pre-Surgical Investigation System by VR+AR+MR Techniques.

[BibT_eX]

[DOI]

Huy Anh Nguyen

Tang-Chieh Liu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Development of a Portable Self-Guidance Rescue Car and a 3D-Screen LIDAR Mapping System.

[BibT_eX]

[DOI]

Pham Minh Dung

Tang-Chieh Liu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Quantity Evaluation and Reconfiguration Mechanism for Signal- and Power-Interconnections in 3D-Stacking System.

[BibT_eX]

[DOI]

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

A Real-Time Robot-Arm Surgical Guiding System Development by Image-Tracking.

[BibT_eX]

[DOI]

Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020

2019

A Stable Video Stitching Technique for Minimally Invasive Surgery.

[BibT_eX]

[DOI]

Dinh Thai Kim

Proceedings of the 2019 9th International Conference on Biomedical Engineering and Technology, 2019

Digitalized-Management Voltage-Domain Programmable Mechanisms for Dual-Vdd Low-Power Embedded Digital Systems.

[BibT_eX]

[DOI]

Tang-Chieh Liu

Proceedings of the 22nd IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2019

A Learnable Unmanned Smart Logistics Prototype System Design and Implementation.

[BibT_eX]

[DOI]

I-Lok Cheng

Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019

2016

A hierarchy multiple-voltage design technique for low-power performance-manageable bio-chips.

[BibT_eX]

[DOI]

Yu-Shin Wang

Proceedings of the IEEE International Conference on Consumer Electronics-Taiwan, 2016

A variable-voltage low-power technique for digital circuit system.

[BibT_eX]

[DOI]

Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015

SCKVdd: A Scalable Clock-Controlled Self-Stabilized Voltage Technique for Low Power CMOS Digital Circuits.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2015

A power-aware quad-voltage H.264 encoder chip for wireless panoramic endoscope applications.

[BibT_eX]

[DOI]

Proceedings of the VLSI Design, Automation and Test, 2015

A wireless panoramic endoscope system design and implementation for minimally invasive surgery.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

An ECG front-end circuit with single power supply.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2015

2014

A panoramic endoscope design and implementation for Minimally Invasive Surgery.

[BibT_eX]

[DOI]

Chun-Hsiang Peng

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013

Design Example of Useful Memory Latency for Developing a Hazard Preventive Pipeline High-Performance Embedded-Microprocessor.

[BibT_eX]

[DOI]

VLSI Design, 2013

Reduction of current mismatching in the switches-in-source CMOS charge pump.

[BibT_eX]

[DOI]

Microelectron. J., 2013

A low-cost scalable Voltage-Frequency Adjustor for implementing low-power systems.

[BibT_eX]

[DOI]

Sheng-Wei Hsu

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Integrated amorphous-Si TFT circuits for gate drivers on LCD panels.

[BibT_eX]

[DOI]

Proceedings of the IEEE 10th International Conference on ASIC, 2013

2012

A high-speed dual-phase processing pipelined domino circuit design with a built-in performance adjusting mechanism.

[BibT_eX]

[DOI]

Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012

2011

A digitalized management mechanism for low-cost low-power multiple-voltage 3D designs.

[BibT_eX]

[DOI]

Proceedings of the IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W 2011), 2011

Built-in fine resolution clipping with calibration technique for high-speed testing by using wireless testers.

[BibT_eX]

[DOI]

Chen-I Chung

Proceedings of the IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W 2011), 2011

A low-power management technique for high-performance domino circuits.

[BibT_eX]

[DOI]

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

Dual-phase pipeline circuit design automation with a built-in performance adjusting mechanism.

[BibT_eX]

[DOI]

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

A H.264/MPEG-2 dual mode video decoder chip supporting temporal/spatial scalable video.

[BibT_eX]

[DOI]

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010

Dynamic voltage domain assignment technique for low power performance manageable cell based design.

[BibT_eX]

[DOI]

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

Built-in self at-speed delay binning and calibration mechanism in wireless test platform.

[BibT_eX]

[DOI]

Chen-I Chung

Jyun-Sian Jhou

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

Fine resolution double edge clipping with calibration technique for built-in at-speed delay testing.

[BibT_eX]

[DOI]

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009

A 252Kgates/4.9Kbytes SRAM/71mW multistandard video decoder for high definition video applications.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2009

CKVdd: A Clock-Controlled Self-Stabilized Voltage Technique for Reducing Dynamic Power in CMOS Digital Circuits.

[BibT_eX]

[DOI]

Chin-Hsien Wang

IEICE Trans. Electron., 2009

Fine resolution double edge clipping with calibration technique for built-in at-speed delay testing.

[BibT_eX]

[DOI]

Chen-I Chung

Shuo-Wen Chang

Proceedings of the 2009 IEEE International Test Conference, 2009

A Multi-standard Video Decoder for High Definition Video Applications.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Design High-Performance and Low-Power Adder Cores with Full-Swing Nodes for Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the Fifth International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP 2009), 2009

Functional Built-In Delay Binning and Calibration Mechanism for On-Chip at-Speed Self Test.

[BibT_eX]

[DOI]

Proceedings of the Eighteentgh Asian Test Symposium, 2009

CKVdd: a self-stabilization ramp-vdd technique for dynamic power reduction.

[BibT_eX]

[DOI]

Chin-Hsien Wang

Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

A full-synthesizable high-precision built-in delay time measurement circuit.

[BibT_eX]

[DOI]

Ming-Chien Tsai

Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008

An All-Digital High-Precision Built-In Delay Time Measurement Circuit.

[BibT_eX]

[DOI]

Ming-Chien Tsai

Chiou-Mao Yang

Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008

2007

Fixed-outline floorplanning using robust evolutionary search.

[BibT_eX]

[DOI]

Eng. Appl. Artif. Intell., 2007

Using Clock-Vdd to Test and Diagnose the Power-Switch in Power-Gating Circuit.

[BibT_eX]

[DOI]

Hsiang-Hui Huang

Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007

A 252kgate/71mW Multi-Standard Multi-Channel Video Decoder for High Definition Video Applications.

[BibT_eX]

[DOI]

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

Noise-Aware Floorplanning for Fast Power Supply Network Design.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2003

Design Scan Test Strategy for Single Phase Dynamic Circuits.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 2003

2002

Novel Techniques for Improving Testability Analysis.

[BibT_eX]

[DOI]

Yin-He Su

Shih-Chieh Chang

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

Adaptable Voltage Scan Testing of Charge-Sharing Faults for Domino Circuits.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 2002

2001

Charge-sharing alleviation and detection for CMOS domino circuits.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

2000

Synthesis of CMOS Domino Circuits for Charge Sharing Alleviation.

[BibT_eX]

[DOI]

Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000

Low-Speed Scan Testing of Charge-Sharing Faults for CMOS Domino Circuits.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 2000

Charge sharing fault analysis and testing for CMOS domino logic circuits.

[BibT_eX]

[DOI]

Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000

1999

Charge Sharing Fault Detection for CMOS Domino Logic Circuits.

[BibT_eX]

[DOI]

Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '99), 1999

1997

A Comprehensive Reconfiguration Scheme for Fault-Tolerant VLSI/WSI Array Processors.

[BibT_eX]

[DOI]

Yung-Yuan Chen

Shambhu J. Upadhyaya

IEEE Trans. Computers, 1997

1995

An efficient switching network fault diagnosis for reconfigurable VLSI/WSI array processors.

[BibT_eX]

[DOI]

Yung-Yuan Chen

Jwu-E Chen

Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995

1994

An Effective Reconfiguration Process for Fault-Tolerant VLSI/WSI Array Processors.

[BibT_eX]

[DOI]

Yung-Yuan Chen