Ching-En Lee
According to our database1,
Ching-En Lee
authored at least 12 papers
between 2000 and 2022.
Collaborative distances:
Collaborative distances:
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Bibliography
2022
VOTA: A Heterogeneous Multicore Visual Object Tracking Accelerator Using Correlation Filters.
IEEE J. Solid State Circuits, 2022
2021
SNAP: An Efficient Sparse Neural Acceleration Processor for Unstructured Sparse Deep Neural Network Inference.
IEEE J. Solid State Circuits, 2021
VOTA: A 2.45TFLOPS/W Heterogeneous Multi-Core Visual Object Tracking Accelerator Based on Correlation Filters.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
2020
A Pre-Bootstrapping Method for Use in Gate Driver Circuits to Improve the Scan Pulse Delay of High-Resolution TFT-LCD Systems.
IEEE Trans. Ind. Electron., 2020
2019
IEEE J. Solid State Circuits, 2019
SNAP: A 1.67 - 21.55TOPS/W Sparse Neural Acceleration Processor for Unstructured Sparse Deep Neural Network Inference in 16nm CMOS.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019
2015
Reconfıgurable and selectively-adaptive signal processing for multi-mode wireless communication.
Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015
An error-compensated piecewise linear logarithmic arithmetic unit for phong lighting acceleration.
Proceedings of the 49th Asilomar Conference on Signals, Systems and Computers, 2015
2005
A heuristic algorithm to minimize total weighted tardiness on a single machine with release times.
Int. Trans. Oper. Res., 2005
2001
Eur. J. Oper. Res., 2001
2000
Int. J. Manuf. Technol. Manag., 2000