Chin-Ho Chang

According to our database, Chin-Ho Chang authored at least 4 papers between 2014 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Current Mirrors with Tapered Stacked-Gates for Area Saving or Noise Improvement in 3nm FinFET Process.

Chu-En Hsia, Chin-Ho Chang, Yung-Shun Chen, Po-Yu Lai, Ching Lin Jen, Yung-Chow Peng, Shenggao Li

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2019

A 0.7V, 2.35% 3σ-Accuracy Bandgap Reference in 12nm CMOS.

Yi-Wen Chen, Jaw-Juinn Horng, Chin-Ho Chang, Amit Kundu, Yung-Chow Peng, Mark Chen

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2014

A 0.7V resistive sensor with temperature/voltage detection function in 16nm FinFET technologies.

Jaw-Juinn Horng, Szu-Lin Liu, Amit Kundu, Chin-Ho Chang, Chung-Hui Chen, Herman Chiang, Yung-Chow Peng

Proceedings of the Symposium on VLSI Circuits, 2014

An ultra-compact, untrimmed CMOS bandgap reference with 3σ inaccuracy of +0.64% in 16nm FinFET.

Chin-Ho Chang, Jaw-Juinn Horng, Amit Kundu, Chih-Chiang Chang, Yung-Chow Peng

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014