Chin-Fu Nien

Orcid: 0000-0002-1892-6691

According to our database1, Chin-Fu Nien authored at least 10 papers between 2020 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
Design and Implementation of a VLSI-based Annealing Accelerator for Efficiently Solving Combinatorial Optimization Problems.
IEEE Trans. Circuits Syst. II Express Briefs, September, 2024

ReAIM: A ReRAM-based Adaptive Ising Machine for Solving Combinatorial Optimization Problems.
Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024

ReTAP: Processing-in-ReRAM Bitap Approximate String Matching Accelerator for Genomic Analysis.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023
An Automated Toolchain for QUBO-based Optimization with Quantum-inspired Annealers.
Proceedings of the 20th International SoC Design Conference, 2023

2022
DL-RSIM: A Reliability and Deployment Strategy Simulation Framework for ReRAM-based CNN Accelerators.
ACM Trans. Embed. Comput. Syst., 2022

Four-Frequency Small-Signal Model for High-Bandwidth Voltage Regulator With Current-Mode Control.
IEEE Access, 2022

RePAIR: A ReRAM-based Processing-in-Memory Accelerator for Indel Realignment.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021
ReSpar: Reordering Algorithm for ReRAM-based Sparse Matrix-Vector Multiplication Accelerator.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021

RePIM: Joint Exploitation of Activation and Weight Repetitions for In-ReRAM DNN Acceleration.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
GraphRSim: A Joint Device-Algorithm Reliability Analysis for ReRAM-based Graph Processing.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020


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