Chilhee Chung
According to our database1,
Chilhee Chung
authored at least 10 papers
between 2005 and 2013.
Collaborative distances:
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Bibliography
2013
Proceedings of the 21st Color and Imaging Conference, 2013
Proceedings of the Three-Dimensional Image Processing (3DIP) and Applications 2013, 2013
2012
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
Novel Deep Trench Buried-Body-Contact (DBBC) of 4F<sup>2</sup> cell for sub 30nm DRAM technology.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012
Proceedings of the 2012 European Solid-State Device Research Conference, 2012
2011
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011
2010
Dynamic Vpass Controlled Program Scheme and Optimized Erase Vth Control for High Program Inhibition in MLC NAND Flash Memories.
IEEE J. Solid State Circuits, 2010
A 159mm<sup>2</sup> 32nm 32Gb MLC NAND-flash memory with 200MB/s asynchronous DDR interface.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2005
An embedded nonvolatile FRAM with electrical fuse repair scheme and one time programming scheme for high performance smart cards.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005