Chikako Nakanishi

According to our database, Chikako Nakanishi authored at least 8 papers between 1993 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2018

A low power, VLSI object recognition processor using Sparse FIND feature for 60 fps HDTV resolution video [IEICE Electronics Express Vol. 14(2017) No. 15 pp. 20170668].

Go Matsukawa, Taisuke Kodama, Yuri Nishizumi, Koichi Kajihara, Chikako Nakanishi, Shintaro Izumi, Hiroshi Kawaguchi, Toshio Goto, Takeo Kato, Masahiko Yoshimoto

IEICE Electron. Express, 2018

2017

A low power, VLSI object recognition processor using Sparse FIND feature for 60 fps HDTV resolution video.

Go Matsukawa, Taisuke Kodama, Yuri Nishizumi, Koichi Kajihara, Chikako Nakanishi, Shintaro Izumi, Hiroshi Kawaguchi, Toshio Goto, Takeo Kato, Masahiko Yoshimoto

IEICE Electron. Express, 2017

FPGA implementation of object recognition processor for HDTV resolution video using sparse FIND feature.

Yuri Nishizumi, Go Matsukawa, Koichi Kajihara, Taisuke Kodama, Shintaro Izumi, Hiroshi Kawaguchi, Chikako Nakanishi, Toshio Goto, Takeo Kato, Masahiko Yoshimoto

Proceedings of the 2017 IEEE International Workshop on Signal Processing Systems, 2017

1998

Software pipelining with path selection.

Chikako Nakanishi, Hideki Ando, Tetsuya Hara, Masao Nakaya

Syst. Comput. Jpn., 1998

1996

Performance Comparison of ILP Machines with Cycle Time Evaluation.

Tetsuya Hara, Hideki Ando, Chikako Nakanishi, Masao Nakaya

Proceedings of the 23rd Annual International Symposium on Computer Architecture, 1996

1995

Code scheduling on a superscalar processor: SARCH.

Chikako Nakanishi, Hideki Ando, Hirohisa Machida, Masao Nakaya

Syst. Comput. Jpn., 1995

Unconstrained Speculative Execution with Predicated State Buffering.

Hideki Ando, Chikako Nakanishi, Tetsuya Hara, Masao Nakaya

Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995

1993

Speculative Execution and Reducing Branch Penalty in a Parallel Issue Machine.

Hideki Ando, Chikako Nakanishi, Hirohisa Machida, Tetsuya Hara, Satoru Kishida, Masao Nakaya

Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993