Chihong Zhang
According to our database1,
Chihong Zhang
authored at least 9 papers
between 1993 and 2003.
Collaborative distances:
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Bibliography
2003
Minimum Register Instruction Sequencing to Reduce Register Spills in Out-of-Order Issue Superscalar Architectures.
IEEE Trans. Computers, 2003
2001
Minimum Register Instruction Sequence Problem: Revisiting Optimal Code Generation for DAGs.
Proceedings of the 15th International Parallel & Distributed Processing Symposium (IPDPS-01), 2001
1999
Minimum Register Instruction Scheduling: A New Approach for Dynamic Instruction Issue Processors.
Proceedings of the Languages and Compilers for Parallel Computing, 1999
Proceedings of the Compiler Construction, 8th International Conference, 1999
1997
Proceedings of the 1997 Advances in Parallel and Distributed Computing Conference (APDC '97), 1997
Proceedings of the 1997 Advances in Parallel and Distributed Computing Conference (APDC '97), 1997
Proceedings of the 1997 Advances in Parallel and Distributed Computing Conference (APDC '97), 1997
1993
Proceedings of the 26th Annual International Symposium on Microarchitecture, 1993