Chiheb Rebai

Orcid: 0000-0002-6530-0755

According to our database1, Chiheb Rebai authored at least 50 papers between 2001 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
The Environmental Impacts of Radio Frequency and Power Line Communication for Advanced Metering Infrastructures in Smart Grids.
Sensors, December, 2023

2021
Sensor Data Augmentation Strategy for Load Forecasting in Smart Grid Context.
Proceedings of the 18th International Multi-Conference on Systems, Signals & Devices, 2021

2020
Effect of NB-PLC Channel Models on Transfer Function Estimation in Industrial Environment.
Proceedings of the 17th International Multi-Conference on Systems, Signals & Devices, 2020

2018
Preamble based SNR estimation for IEEE 802.15.4g MR-OFDM.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017
Impact of equalization on hybrid communication system for smart grid.
Proceedings of the 2017 International Symposium on Networks, Computers and Communications, 2017

Time-domain characterization of a wireless ECG system event driven A/D converter.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2017

2016
Programmable Parallel FBD Sigma Delta ADC Reconstruction stage Design for Software Defined Radio receiver.
Int. J. Comput., 2016

Mathematical modeling of clean and noisy ECG signals in a level-crossing sampling context.
Proceedings of the International Symposium on Signal, Image, Video and Communications, 2016

Level-crossing ADC modeling for wireless electrocardiogram signal acquisition system.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2016

Accurate Level-crossing ADC Design for Biomedical Acquisition Board.
Proceedings of the 9th International Joint Conference on Biomedical Engineering Systems and Technologies (BIOSTEC 2016), 2016

2015
Digital reconstruction stage of parallel FBD sigma delta ADC implementation based on programmable digital oscillator in SDR receiver.
Proceedings of the 2015 IEEE Symposium on Computers and Communication, 2015

Generation of cyclostationary noise for narrowband powerline channel emulation.
Proceedings of the IEEE 5th International Conference on Consumer Electronics - Berlin, 2015

Narrowband powerline channel emulation platform for smart grid applications.
Proceedings of the Global Summit on Computer & Information Technology, 2015

On the emulation of narrowband powerline communication noise scenario.
Proceedings of the 12th IEEE International Multi-Conference on Systems, Signals & Devices, 2015

2014
Toward Time-Quantized Pseudorandom Sampling for Green Communication.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

Impact of mains zero crossing synchronization on powerline communication.
Proceedings of the International Symposium on Networks, Computers and Communications, 2014

Advanced physical layer for robust power line communications based on coded modulation.
Proceedings of the International Symposium on Networks, Computers and Communications, 2014

Optimum receiver of coded M-FSK modulation for power line communications.
Proceedings of the IEEE Symposium on Computers and Communications, 2014

Measurement platform of mains zero crossing period for powerline communication.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2014

Towards flexible parallel sigma delta modulator for software defined radio receiver.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2014

S-FSK modem design and experimental validation for robust narrowband powerline communication.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2014

Advanced DSP Based Narrowband PLC Modem for Smart Grids Applications.
Proceedings of the 2014 IEEE International Conference on High Performance Computing and Communications, 2014

LDPC coded S-FSK modulation for power line communications.
Proceedings of the Fourth International Conference on Communications and Networking, 2014

DSP-based implementation of soft Viterbi decoder for power line communications.
Proceedings of the 11th IEEE Consumer Communications and Networking Conference, 2014

2013
Bottom-up approach for narrowband powerline channel modeling.
Proceedings of the 2013 IEEE Global Communications Conference, 2013

2012
Improved Maximum Likelihood S-FSK Receiver for PLC Modem in AMR.
J. Electr. Comput. Eng., 2012

New digital predistortion design based on mixed-signal cartesian feedback training for 3G homodyne transmitter.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012

Towards non-uniformly controlled charge domain sample and hold for SDR receiver baseband stage.
Proceedings of the 7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2012

2011
Nonuniformly Controlled Analog-to-Digital Converter for SDR Multistandard Radio Receiver.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

Test setup and spurious replicas identification in time-quantized pseudorandom sampling-based ADC in SDR multistandard receiver.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

2010
Pseudorandom Direct Sampler for Non-Uniform Sub-sampling Architecture in a Multistandard Receiver.
J. Comput., 2010

Digital High Order Multiplier-free Delta Sigma Modulator for Multistandard Fractional-N Frequency Synthesizer.
J. Comput., 2010

2009
Pseudorandom signal sampler for relaxed design of multistandard radio receiver.
Microelectron. J., 2009

2008
Track and hold circuit design and implementation in 65 nm CMOS technology for RF subsampling receivers.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007
Built-in Filtering for Out-of-Channel Interferers in Continuous-Time Quadrature Bandpass Delta Sigma Modulators.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

2006
Optimized Design of a Digital IQ Demodulator Suitable for Adaptive Predistortion of 3rd Generation Base Station PAs.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

Intra- and Inter-Processors Memory Size Estimation for Multithreaded MPSoC Modeled in Simulink.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

Continuous-Time Complex Bandpass Modulator: Key Component for Highly Digitized Receiver.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

Analysis and optimization of power line coupling circuit for CENELEC-PLC Modem.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

RF Digital Predistorter for Power Amplifiers of 3G Base Stations.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005
Embedded software implementation of an adaptive baseband predistorter.
Proceedings of the 12th IEEE International Conference on Electronics, 2005

Multi-correlator based multipath mitigation technique for a GPS receiver.
Proceedings of the 12th IEEE International Conference on Electronics, 2005

FPGA bulding blocks for an hybrid base band digital predistorter suitable for 3G poweramplifiers.
Proceedings of the 12th IEEE International Conference on Electronics, 2005

Design strategy for high order continuous-time ΔΣ modulator for multistandard receiver.
Proceedings of the 12th IEEE International Conference on Electronics, 2005

2004
Signal generation using single-bit sigma-delta techniques.
IEEE Trans. Instrum. Meas., 2004

Noncoherent spectral analysis of ADC using filter Bank.
IEEE Trans. Instrum. Meas., 2004

2003
High order 1-bit digital sigma delta modulation for on chip analogue signal sources.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
LDI filter bank for ADC frequency domain analysis.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

Digital sigma delta modulation for on chip signal generation.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

2001
Design and implementation of an audio analog to digital converter using oversampling techniques.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001


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