Chih-Shun Ding

According to our database1, Chih-Shun Ding authored at least 9 papers between 1996 and 2000.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2000
Improving the efficiency of Monte Carlo power estimation [VLSI].
IEEE Trans. Very Large Scale Integr. Syst., 2000

1998
Cycle-accurate macro-models for RT-level power analysis.
IEEE Trans. Very Large Scale Integr. Syst., 1998

Stratified random sampling for power estimation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

Gate-level power estimation using tagged probabilistic simulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

Improving sampling efficiency for system level power estimation.
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998

1997
A Power Estimation Framework for Designing Low Power Portable Video Applications.
Proceedings of the 34st Conference on Design Automation, 1997

Statistical Estimation of the Cumulative Distribution Function for Power Dissipation in VLSI Cirucits.
Proceedings of the 34st Conference on Design Automation, 1997

Statistical design of macro-models for RT-level power evaluation.
Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

1996
Statistical sampling and regression analysis for RT-level power evaluation.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996


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