Chih-Hsing Lin
According to our database1,
Chih-Hsing Lin
authored at least 18 papers
between 2007 and 2018.
Collaborative distances:
Collaborative distances:
Timeline
2008
2010
2012
2014
2016
2018
0
1
2
3
4
5
1
1
1
2
1
1
1
4
2
1
2
1
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2018
Temperature Variation Tolerance High Resolution Real-time Liquid Level Monitoring System.
Proceedings of the 8th IEEE International Conference on Consumer Electronics - Berlin, 2018
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018
2015
A real-time bridge structural health monitoring device using cost-effective one-axis accelerometers.
Proceedings of the Tenth IEEE International Conference on Intelligent Sensors, 2015
2014
Proceedings of the IEEE Sensors Applications Symposium, 2014
2013
IEEE Trans. Very Large Scale Integr. Syst., 2013
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013
2012
Proceedings of the IEEE 25th International SOC Conference, 2012
Microphone array application prototyping with MorPACK heterogeneous integrated system.
Proceedings of the IEEE/SICE International Symposium on System Integration, 2012
Proceedings of the International Symposium on Intelligent Signal Processing and Communications Systems, 2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
2011
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2010
Switching Bilateral Filter With a Texture/Noise Detector for Universal Noise Removal.
IEEE Trans. Image Process., 2010
A packet-based emulating platform with serializer/deserializer interface for heterogeneous IP verification.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
IEEE Trans. Very Large Scale Integr. Syst., 2009
2008
A 28Gbps 4×4 switch with low jitter SerDes using area-saving RF model in 0.13µm CMOS technology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
A 2.64GHz wide range low power DLL-based frequency multiplier with CML circuits using adaptive body bias.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008
2007
A 2.24GHz Wide Range Low Jitter DLL-Based Frequency Multiplier using PMOS Active Load for Communication Applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007