Chih-Hao Chao

According to our database1, Chih-Hao Chao authored at least 15 papers between 2007 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
Thermal/Traffic Mutual-Coupling Co-simulation Platform for 3D Network-on-Chip (NoC) Designs.
Proceedings of the 10th International Workshop on Network on Chip Architectures, 2017

2015
Regional ACO-Based Cascaded Adaptive Routing for Traffic Balancing in Mesh-Based Network-on-Chip Systems.
IEEE Trans. Computers, 2015

2013
Routing-Based Traffic Migration and Buffer Allocation Schemes for 3-D Network-on-Chip Systems With Thermal Limit.
IEEE Trans. Very Large Scale Integr. Syst., 2013

Transport-layer-assisted routing for runtime thermal management of 3D NoC systems.
ACM Trans. Embed. Comput. Syst., 2013

2012
Transport-layer assisted vertical traffic balanced routing for thermal-aware three-dimensional Network-on-Chip systems.
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012

2011
Multi-prediction particle filter for efficient parallelized implementation.
EURASIP J. Adv. Signal Process., 2011

Multi-Pheromone ACO-based routing in Network-on-Chip system inspired by economic phenomenon.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011

Transport Layer Assisted Routing for Non-Stationary Irregular mesh of thermal-aware 3D Network-on-Chip systems.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011

2010
Traffic- and Thermal-Aware Run-Time Thermal Management Scheme for 3D NoC Systems.
Proceedings of the NOCS 2010, 2010

Regional ACO-based routing for load-balancing in NoC systems.
Proceedings of the Second World Congress on Nature & Biologically Inspired Computing, 2010

2008
Traffic-Balanced Routing Algorithm for Irregular Mesh-Based On-Chip Networks.
IEEE Trans. Computers, 2008

Location-Constrained Particle Filter human positioning and tracking system.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008

2007
Dynamic Channel Flow Control of Networks-on-Chip Systems for High Buffer Efficiency.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

A New Binomial Mapping and Optimization Algorithm for Reduced-Complexity Mesh-Based On-Chip Network.
Proceedings of the First International Symposium on Networks-on-Chips, 2007

A Power-Aware Reconfigurable Rendering Engine Design with 453MPixels/s, 16.4MTriangles/s Performance.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007


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